We are developing a multi channel PA amplifier with transformer-coupled 100V line outputs using TAS5630B chips. Our 4-layer pcb with TAS5630B chips works perfectly in 2 x BTL mode, with identical measured gains on each of the two BTL outputs from the same chip.
We wish the amplifier to be able to work in 2-channel BTL mode (2 x 125W) or in 1-channel PBTL mode (1 x 250W), so we have two balanced output filters, two separate output transformers, and the paralleling of the output will be done at the secondaries of the output transformers. As I said, the 2 x BTL mode works perfectly.
To check single channel PBTL mode I set the board for PBTL operation in AD modulation mode. (We are using AD mode to reduce the level of common-mode EMI on the long 100V speaker lines). The single balanced audio input was applied to inputs 1/2, but I deliberately did not connect the BTL ouputs in parallel, so that I could measure if the signal level at each output was the same, so that there would be no re-circulating currents flowing between the two outputs when they are paralleled. To my surprise, the output of the ch 3/4 section was 2.25% higher in the output ac voltage (measured at a 1kHz sine wave) than ch 1/2. As the paralleling of the audio path is done inside the TAS5630B, I would have expected the two output levels to be essentially the same, especially as this is the case when the board is in 2 x BTL mode and each channel is fed with the same signal.
I don't want to parallel up the outputs without understanding why there seems to be the gain imbalance in PBTL mode between the two halves.
What is the expected channel balance between each half of a PBTL stage?
Many thanks,
Chris Morriss.
