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SRC4392 DIR UNLOCK status

Erik Booth
Prodigy 80 points

Other Parts Discussed in Thread: SRC4392

Hello,

I am using the SRC4392. I am trying to read the DIR UNLOCK status using I2C at register Page 0 0x14. This bit appears to always be a zero for me showing the AES3 decoder and PLL2 are locked even with no AES3 signal applied. Also this bit does not match the external LOCK_N pin of the device which does toggle as I apply or remove an AES3 signal. I have made sure I unmasked all the Page 0 0x14 status bits by setting all bits of Page 0 0x16 to ones. Furthermore, I can read back the VBIT value properly which is also in register Page 0 0x14. Can someone help determine why this UNLOCK bit does not match the LOCK_N pin?

Thank you,

Erik

  • 0
    TI__Mastermind 28120 points

    Hi Erik,

    Could you send me a register dump of your settings? And more information on your configuration?

    Justin

  • 0 in reply to Justin Bohr
    Prodigy 80 points

    Justin,

    Here are the register values that I send using I2C. After this initialization sequence I poll Page 0 Register 0x14 for the UNLOCK status.


    P0_R7f = 8'b00000000 // Page 0
    P0_R01 = 8'b00111111 // Power/Reset
    P0_R03 = 8'b00110001 // Port A
    P0_R05 = 8'b00000001 // Port B
    P0_R07 = 8'b00101100 // Tx 1
    P0_R09 = 8'b00000001 // Tx 3
    P0_R0e = 8'b00011001 // Rx 2
    P0_R0f = 8'b00010010 // PLL 1
    P0_R10 = 8'b00000000 // PLL 2
    P0_R11 = 8'b00000000 // PLL 3
    P0_R16 = 8'b11111111 // RCVR Mask 1
    P0_R2d = 8'b00000010 // SRC 1 (Mute)
    P1_R7f = 8'b00000010 // Page 2
    P1_R00 = 8'b10000001 // Channel Status
    P1_R01 = 8'b10000001 // Channel Status
    P0_R7f = 8'b00000000 // Page 0

    AES3 data comes in at pins 1 and 2. I am supplying 12.288MHz clock at pins 13 and 25. I am supplying an I2S word clock at pin 38 and I2S bit clock at pin 37. I am receiving I2S data from pin 40. I have a test point at pin 11 for LOCK_N. Please let me know if you need more information.

    Thank you,

    Erik

  • 0 in reply to Erik Booth
    TI__Mastermind 28120 points

    Hi Erik,

    these register settings seem to be correct to enable the UNLOCK pin, are you able to read back the register values after you write them to verify that they were written correctly? Also can you show me what values you do get for register 14?

    Justin

  • 0 in reply to Justin Bohr
    Prodigy 80 points

    Justin,

    I was able to use an oscilloscope to capture data read from register 0x14 at bit 2 (DIR UNLOCK). This bit was going high for a very short while then going back to low. Maybe this is because the act of reading the register clears the data. This will not help me because I would like to know when the DIR is locked and also when it is unlocked.

    I have figured out a way to do this. Register 0x18 can set the interrupt mode for the DIR status bits. I set the DIR UNLOCK mode to Level Active and now I get the desired behavior that I need. This bit now matches the LOCK_N pin.

    Thank you for you help.

    Erik

  • 0 in reply to Erik Booth
    TI__Mastermind 28120 points

    Hi Erik,

    Glad to hear it! Thanks for posting how you solved it as it may help others in the future.

    Justin