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PCM2706C: How to control 1.5kohm pull up on USB D+ so it's not activated until configuration programming from EEPROM is complete?

Lance Garland1
Prodigy 50 points
Other Parts Discussed in Thread: PCM2706C, PCM2704C

Page 22 of the PCM2706C datasheet instructs:

"the D+ pin pullup resistor must not be activated before programming the descriptor data through the external ROM or SPI port is completed."

How is that accomplished? I don't see any implementation of this in the datasheet circuit diagrams or EVM board. Since this EEPROM feature is only available in bus-powered mode it seems the PCM2706C should manage this on its own. Does this demand a system microcontroller to manage? But how would the system know when the programming from the EEPROM is complete?


Thanks,


Lance

  • 0
    TI__Mastermind 27990 points
    Hi Lance,

    I am looking into this for you. I believe the intended setup is shown in the PCM2704C application circuit on page 30 of the data sheet using the HOST and PSEL pins to affect the pull up circuit to the D+ line. I want to check and make sure this will work for the PCM2706C first.

    Justin
  • 0 in reply to Justin Bohr
    Prodigy 50 points
    Thank you Justin. In the circuit you mention Host, PSEL and the pull-up are directly connected to the Vdd output of the internal regulator. How can that satisfy the requirement that the I2C EEPROM be allowed to complete configuration before pulling up the 1.5k?

    Lance
  • 0 in reply to Lance Garland1
    TI__Mastermind 27990 points
    Hi Lance,

    You are correct, the PCM2704C application would not work for this scenario. If you would like to accomplish this with discrete parts, you could apply an RC filter to the clock line going to the EEPROM and a not gate attached to the pull up. The other option is to use a micro controller and have it watch the clock line or a certain delay as the time taken to read from the EEPROM should be fairly consistent.

    Another option if using a host is to just program over SPI and not use the EEPROM.

    Justin
  • 0 in reply to Justin Bohr
    Prodigy 50 points

    Thanks Justin, I figured that was the case. I've decided to monitor the VDD output of the internal regulator with a reset generator chip and use the ~140msec delayed to enable an lvc1g126 buffer to pull the 1.5k to D+ up. I will verify but if the datasheet is right the EEPROM should be done in 20msec or so.

    Lance