About 8ch diff-input to I2S TDM format of PCM1864EVM (2 unit)

Hi Joe,

This collateral along with other updates and content adds are all being put together for an update of the data sheet for the PCM186X parts. We want to try and get all the changes together and make sure things are correct so that we only have to do one update, not several.

Below is some guide for using TDM:

So the basics of TDM for PCM186X are the following:

BCK must be at 256*Fs, this is the only way TDM will work, this is because it locks the I2S to allowing 8 channels of data in one LRCK period.

So if using the crystal at 24.576 MHz they want the clock settings to be the following:

This will result in a 48 kHz sampling rate. If they want to use 96 kHz sampling, lower the divider in the middle currently set at 2, outputting 12.29 MHz, down to 1 and 24.576 MHz.

Even if only using 6 channels, this setup must be used and the other channels will be left in HI-Z. For the second PCM1864, you must set the TX offset to be 4 channels worth of audio data, therefore it will be HI-Z for the first 4 channels and let the other PCM1864 talk on the data line, then for the 5^th and 6^th slot, it will transmit its data.

50% duty cycle for LRCK must be used in master mode, wither 1/256 pulse or 50% duty cycle can be used in slave.

Justin