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TLV320AIC3107 status bits at not fully powered

Other Parts Discussed in Thread: TLV320AIC3107, TLV320AIC3107EVM-K

Hi,

I received a question from our customer about a read only register and some status bits of TLV320AIC3107.
Their question is the reason why the following registers changed from reset values,
though its module had not been fully powered up.

1) Page 0/Register 32 Left AGC Gain Register value change from 0000000 to 1010000,
when Left AGC is disabled (Page 0/ Register 26/ D7=0).

2) Page 0/Register 51/D1 HPLOUT Volume Control Status change from 1 to 0,
when HPLOUT is not fully powered up (D0=0).

3) Page 0/Register 58/D1 HPCOM Volume Control Status change from 1 to 0,
when HPCOM is not fully powered up (D0=0).

4) Page 0/Register 65/D1 HPROUT Volume Control Status change from 1 to 0,
when HPROUT is not fully powered up (D0=0).

best regards,
Akio Ito

  • Hi Akio,

    I will review the registers and I will answer you as soon as possible.

    Thank you.

    Best regards,

    Luis Fernando Rodríguez S.

  • Luis-san,

    Thank you for your reply.
    I'm waiting for your answer.

    Best regards,
    Akio Ito
  • Hi Ito-san,

    Sorry for the late response.

    We made some tests with the registers that you mentioned and we found that registers related with the Volume Control Status (Page 0/Register 51, Page 0/Register 58, Page 0/Register 65) have a different behavior. The reset value must be '0' and it changes to '1' when bit D0 (Power Status Bit) is changed to '1'. Additionally, the bit value is inverted in datasheet, in other words:

    When D1 = 0, "not all programmed gains to RIGHT_LOP/M have been applied yet".

    When D1 = 1, when "all programmed gains to RIGHT_LOP/M have been applied".

    The costumers eventually have some problems with these registers (51, 58, 65, 86 & 93), specially with registers 86 and 93, because the bit D0 is marked as a read-only bit. We will work to modify these datasheets as soon as possible to avoid these problems.

    Regarding Left AGC Gain Register (Page 0/Register 32), we made some tests and we always obtained 0000 0000 as value. Could you provide more information about it please?

    Thank you.

    Best regards,

    Luis Fernando Rodríguez S.

  • Luis-san,

    Thank you for your test and answer.

    I will send your answer about HPxxx Output Level Control Register(Page 0/Register 32,58 and 65) to our customer.

    Now, we have two TLV320AIC3107EVM-K. I read the reset value of Left AGC Gain Register in these EVM,
    one is 0x00, another is 0x80. The letter imprinted on the surface of two TLV320AIC3107 are identical.
    So, a board of our customer is maybe 0xB0.

    Today, I tested two EVMs again by AIC3107 CS GUI. The additional test procedure is as follows:
    a) connect TLV320AIC3107EVM-K to PC usb connector, and boot AIC3107 CS GUI.
    b) read the rest value of page0/register30 and 31.
    c) enabel ADC and AGC.
    d) read the value of page0/register30 and 31, confirm read value and reset value are different.
    e) close AIC3107 CS GUI, and disconnect the usb cable.
    f) re-connect the usb cable, and and boot AIC3107 CS GUI.
    g) read the rest value of page0/register30 and 31.

    On this test, the reset values at (b) are 0x00 and 0x80, on the other hand the values at (g) are near the read data at (d).
    I guess from the result of this test, these registers are not cleared at its reset sequence.

    Regarding AGC Gain Register, I already answered to them that it is not necessary to mind the register value if they do not use AGC.


    Best regards,
    Akio Ito

  • Hi Ito-san,

    You're right, it seems that the software reset doesn't affect the AGC Gain Registers and the last value is conserved. I suggest to read these registers only when the AGC is enabled.

    I hope this helps you. If you still have questions, please let me know.

    Best regards,

    Luis Fernando Rodríguez S.