Regarding Codec LM49352 issues

Hi Sriram,

I will try to help you with this issue.
Could you upload your schematic and show me all the register settings?

Andy

Hi Andy,

Thank you very much for your valuable time.

We have managed to solve the left channel issue by keeping LM49352 as slave.

But noise in 3G call is not yet solved. There is no way around to solve it other than changing the register settings.

I have uploaded the schematics and register settings used for 3G Voice call. Please refer and provide suggestions.

	Audio Data Used:- PCM 16 bit depth data, 1 channel, 8 KHz Sampling rate, 2.048 MHz Bit clock, LM49352 as Slave
No	Register Name	Address	Value	Details
PMC Setup
1	Basic PMC Setup Register	0x00	0x13	CHIP is turned on PLL1 is enabled
2	PMC Clocks Register	0x01	0x0	MCLK is chosen
PLL
3	PLL_CLOCK_SOURCE	0x03	0x0	MCLK is chosen
4	PLL_M	0x04	0x4	PLL_M divider 2.5 to generate 2048000 Hz
5	PLL_N	0x05	0x20	PLL_N divider 32 to generate 2048000 Hz
6	PLL_N_MOD	0x06	0x00	PLL_N_MOD set to 0
7	PLL_P1	0x07	0x95	PLL_P1 divider 149 to generate 2048000 Hz
ADC
8	ADC_INPUT	0x15	0x8	MIC_ADCL The MIC input is added to the ADC left input.
9	MIC_INPUT	0x16	0xf	MIC_LEVEL is set to 36 dB
10	ADC Basic	0x20	0x33	MONO - Mono Voice (Right ADC channel disabled, Left ADC channel active) OSR - 128 ADC_CLK_SEL - set to PLL_OUTPUT1
11	ADC_CLK_DIV	0x21	0x00	clock divider set to 0
12	ADC_MIXER	0x23	0x0f	ADC_MIX_LEVEL_L set to 6dB ADC_MIX_LEVEL_R set to 6dB
DAC
13	DAC Basic	0x30	0x31	over sampling ratio 128 is chosen DAC_CLK_SEL set to PLL_OUTPUT1
14	DAC_CLK_DIV	0x31	0x00	Clock divider set to 0
15	Audio Port 2 Input	0x43	0x21	ADC_L is fed to Audio Port 2's Left TX Channel. MONO - is set
16	DAC Input Select	0x44	0x09	This adds Audio Port 1's left RX channel to the DAC's left input. This adds Audio Port 1's right RX channel to the DAC's right input.
Port2
17	BASIC_SETUP	0x60	0x26	RX_ENABLE If set, the input is enabled (enables the SDI port and input shift register and any clock generation required). TX_ENABLE If set, the output is enabled (enables the SDO port and output shift register and any clock generation required). CLOCK_PHASE - PCM (TX on rising edge, RX on falling edge)
18	CLK_GEN_1	0x63	0x3a	SYNC_RATE is set 16 SYNC_WIDTH is set 16
19	DATA_WIDTHS	0x64	0x1b	RX_WIDTH is set to 16 bits per word TX_WIDTH is set to 16 bits per word
20	RX_MODE	0x65	0x2	MSB Justified is chosen MSB_POSITION is set to 1(I2S/PCM Short)
21	TX_MODE	0x66	0x2	MSB Justified is chosen MSB_POSITION is set to 1(I2S/PCM Short)
DAC ALC
22	DAC EFFECTS	0x71	0xf	DAC_ALC_ENB - This enables the DAC's Automatic Level Control DAC_PK_ENB - This enables the DAC's Peak Detector DAC_EQ_ENB - This enables the DAC's 5-band Parametric EQ.
23	DAC_ALC_1	0xa0	0x0	DAC_SAMPLE is set around 8kHz
24	DAC_ALC_4	0xa3	0xa	ATTACK_RATE is set default
25	DAC_ALC_5	0xa4	0xa	DECAY_RATE is set default
26	DAC_ALC_6	0xa5	0xa	HOLD_TIME is set default
27	DAC_ALC_7	0xa6	0x33	MAX_LEVEL gain is set to 0x33
28	DAC_L_LEVEL	0xa8	0x3f	DAC_L_LEVEL is set 18 dB
29	DAC_R_LEVEL	0xa9	0x3f	DAC_R_LEVEL is set 18 dB

Thanks and Regards,

Sriram

Hi Sriram，

When you mentioned that "There is no way around to solve it other than changing the register settings", did you mean that you could solve this issue by changing some register settings?

In addition, could you elaborate on "Heavy noise in 3G voice call"? Does this noise appear on the loudspeaker or headphone?

Andy

Hi Andy,

I meant that register settings is the only way to solve this noise issue. So far we couldn't  solve the issue .

And we getting the noise only in Microphone. The headphone output is pretty clear. The issue must be in the ADC configuration registers.

Please let me know if you need any details.

Thanks and Regards,

Sriram.

Hi Andy,

Any suggestions for the noise issue?
What is the value of maximum and minimum input level ( dB ) of LM49352 microphone pre-amplifier?
Do you have typical register settings for ADC to get Mono PCM data from microphone?

Thanks and Regards,
Sriram.

Hi Sriram，

Did you try enabling the ADC DSP engine inside? I took at a look at your register settings and you enabled the DAC's ALC, but I didn't see you enable the ADC effects yet. The LM49352 is a legacy device which doesn't have an official EVM now, so it is difficult for me to verify your issue.

Regarding the register settings for ADC to get Mono PCM data from microphone, I don't have them. However, I think it might be good for you to take a look at the link:
mailman.alsa-project.org/.../037806.html. The web page shows a Linux driver for LM49352, which seems to have some good register settings. In addition, the ADC DSP engine is enabled in this driver code.

Andy

Hi Andy,

We have tried those settings from that driver file already but no improvement . That's why we disabled ADC ALC. And without ADC ALCs, the noise is little low.

Actually we are using electret microphone with ferrite bead. Is that okay?

Do you suggest any hardware modifications or microphone change in the hardware?

For you reference, i have attached the ferrite circuit. Pls suggest if any.

Thanks and Regards,

Sriram