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PCM4202 ADC issue

ti_geek
Prodigy 90 points
Other Parts Discussed in Thread: PCM4202

I'm having problems with this 4202 part on another new product design.

Running in slave mode,  48K sample rate,  so FS0,FS1,FS2,  FMT0, FMT1, HPFD are all tied to GND.

SCKI is 12 MHz (256FS)  and BCK is 6 MHZ (128FS). 

It seems I can get the ADC in a mode where the noise level jumps like 40db up from spec/baseline level.   We first noticed this just doing some random testing. Since then, I've poked around some more and made the following observations.

If the 4202 is operating as expected,  I can heat board up and all is still good.

If I get my can of freeze mist and chill the 4202 a little bit,  still good.  If I chill enough to get frost,  I can here brief intervals of noise jumping up and then calming down as the frost transitions to water. 

If I do this frosting cycle a few more times,   I can get it to where the ADC gets into this noisy mode and stays there.   If I force a reset  (this requires my FPGA to do a full reprogram cycle which kills all clocks,  restarts clocks and then releases reset),  the noise clears up and all is good again.

This text from spec page 16 is a little puzzling to me....  I'd like to know what sensitivity issues they are talking about.


The BCK rate is typically equal to 128fS in Single Rate sampling mode, and 64fS in

Dual or Quad Rate sampling modes. Although other BCK clock rates are possible, they
are not recommended as a result if potential clock phase sensitivity issues, which can

degrade the dynamic performance of the PCM4202.

I have this part running on other designs that happens to be running at 64Fs BCK rate and haven't had an issue as yet. 

  • 0
    TI__Guru* 97955 points
    ti_geek,


    I'm moving this post to the Audio Converters Forum. The engineers on this forum should be able to help you out.


    Joseph Wu
  • 0 in reply to Joseph Wu
    TI__Mastermind 27990 points
    Hi,

    The PCM4202 is rated to work down to -10 degree C, so if you are going lower than this with your temperature test, we do not guarantee performance past -10 degree C.

    As for the the BCK ratio, this is because the BCK ratio is directly tied to the oversampling rate. Running at 64 FS will be running the oversampling rate at a lower frequency than designed for in Single rate mode. While this will not have a large impact on performance it will have some effect.

    Justin
  • 0 in reply to Justin Bohr
    Prodigy 90 points
    The freeze test was done to stimulate the problem in a repeatable fashion. As noted :

    We first noticed this just doing some random testing. Since then, I've poked around some more and made the following observations.

    Trust me, it wasn't below -10C in the factory in NC when the problem was initially observed. We need a better answer than that.

    I believe we have a run of 25 boards of which I presume we could find one or more that exhibit this problem at various times. I would think we could send a unit in circuit for evaluation if that would be necessary.

    This 40 db jump in noise ought to be something that the engineering staff at TI should be able to attribute to some condition. I would hope to hear back from TI come Monday with either a more substantive explanation or a call to further discuss what I might look for.
  • 0 in reply to ti_geek
    TI__Mastermind 27990 points
    Hi,

    Is there a way you can record the temperature when doing this testing, to find out at what temperature this occurs at and reproduce the problem to try and validate if the problem is temperature? I would suggest trying these same tests on our EVM to narrow down the issue.

    Are you measuring/observing the clocks as this issue occurs, do they change or become unstable?

    Justin
  • 0 in reply to Justin Bohr
    TI__Mastermind 27990 points
    Another thing to note is that if you are running the part in slave mode and providing a 48 kHz LRCK, the part will want 12.228 MHz SCK and a 6.144 MHz BCK. If you wish to continue to run at a 12 MHz SCKI, and 6 MHz BCK, then you should adjust the LRCK rate to be 12 MHz/256. I would recommend running the clocks synchronously and retry the tests.

    What equipment are you using to measure the THD? We use Audio Precision equipment here that cannot drive an audio interface that is not a multiple of the sampling rate, so if sampling at 48 kHz then the SCKI at 256*FS and BCK 128*FS would be 12.288 MHz and 6.144 MHz.

    Justin