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CC85xx I2S interface

Nobuyoshi Arai
Prodigy 10 points

Hello PurePath Wireless team,

 

Please let me ask two questions for CC85xx devices.

 

1. Can CC85xx be both an I2S Master and I2S Slave? Or, can CC85x only be an I2S master mode?

 

2. Is there any mode so that each pins of CC85xx I2S interface can be a High impedance state? (It is good when CC85xx is in reset state because the CC85xx does not work in this case.)

This is the case that CC85xx and an external audio device (Codec chip) are connected with I2S interface and there is another I2S master device on this connection in parallel. While another device is communicating with an external audio device (Codec), CC85xx does not need to work and we want I2S pins of CC85xx to be a Hi-Z state. We would like to know whether it is possible or not.

If it is not possible, we assume that a bus switch device or some additional devices should be required.

 

It would be helpful if you can give any comment or advices.

 

Best Regards,

 

Nobuyoshi Arai

  • 0
    TI__Expert 3240 points

    Hi,

    1. The protocol master can have either internally or externally (from e.g. an external audio device) generated clocks. The protocol slaves can only use the internally generated clocks.

    2. All GIOS and I2S pins except AD2, which is floating due to use for USB, have pull-up on reset. It is not possible to do any configurations to set high impedance manually. So if you intend to have 1 data line that is shard by multiple devices including the CC85xx, you would need to use some kind of bus switch device. 

    Regards,
    Johan 

  • 0 in reply to Johan Gustafsson
    Expert 2575 points
    Johan-san,

    Thank you for the answer.

    I understood the answer of #2, but may I confirm the answer of #1?

    If CC85xx is the protocol slave, CC85xx has to use the internally generated clock. Thus, CC85xx should be I2S master and has to provide the MCLK, BCLK and WCLK to an external device (e.g. Audio codec).

    If CC85xx is the protocol master, CC85xx can use both internally and externally generated clock. In this case, CC85xx can be I2S slave and an external audio device can provide MCLK, BCLK and WCLK to CC85xx.

    Please tell us whether my understanding is correct or not? Thank you for your comment.


    Best Regards,
    Nobuyoshi Arai
  • 0 in reply to Nobuyoshi Arai44
    TI__Expert 3240 points

    Hi,

    Your understanding is correct!

    Regards,
    Johan