Hi,
We want to make DAC_fs = 48KHz from MCLK (24.576MHz), so need to decide PLL parameters.
How to set PLLP/PLLR/PLLJ/PLLD and MDAC/NDAC/DOSR?
Can we use any utility tools to generate configuration file?
Regards
This thread has been locked.
If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.
You do not need the PLL if you have a 24.576MHz MCLK for a sampling rate of 48kHz.
Set:
DOSR = 128
MDAC = 2
NDAC = 2
FS = 24576000 / (2 * 2 * 128) = 48000
You can also use the clock calculation tool from the AIC3111 GUI (see product/EVM folder on ti.com http://www.ti.com/lit/zip/slac289)