adaptive mode for 32x4 help

LostElectron

Other Parts Discussed in Thread: TLV320AIC3254

At the time to write the i2c script to update the first coefficient value of my PurePath design ( C_to_D_1 ), I am a bit confused

with the switch of the buffers.

I got those coefficient regularly and constantly every 100 ms.

What is unclear to me is the documentation speaks about auto-clearing bit but in the Evaluation Module it's not seems to be the case.

#switch off

w 30 00 08

w 30 01 04

#switch on

w 30 00 08

w 30 01 05

it stay in this state when I refresh the GUI with the button.

So can you help me with that and provide me with the correct sequence.

Thanks

Here is my design.

over 11 years ago

0 J- over 11 years ago

TI__Mastermind 46195 points

Hi,

You first need to find what the page and register location of C_to_D_1 is in its properties window. Let assume it is Page 8, Registers 8-11.

# Page 8
w 30 00 08
# Set Coefficient to 0x000001
w 30 08 00 00 01 00

# Swap Buffer
w 30 00 08
w 30 01 05
# Wait until bit D0 clears

# Page 8
w 30 00 08
# Set Coefficient to 0x000001
w 30 08 00 00 01 00

An example can be found in the AIC32x4 Design and Configuration Guide app note in the TLV320AIC3254 web page.

Regards,

J-

0 LostElectron over 11 years ago in reply to J-

Prodigy 180 points

Thanks.

Is it absolutely required to read this bit ?

Assuming I would request the buffers to swap every 200 ms that is quite slow according to DSP's that should be OK, shoudn't it ?

Logic controlling the i2c comes from FPGA and I would like to avoid unecessary i2c reads unless mandatory.

Let me know. Thanks

0 J- over 11 years ago in reply to LostElectron

TI__Mastermind 46195 points

Hi,

A delay is ok. The buffer swap occurs at the end of the frame, so minimum would be 1/Fs, where Fs is the sampling frequency.

Regards,

J-

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adaptive mode for 32x4 help