Hi All,
I have a question about TLV320AIC3100.
My customer hopes to stop the MCLK for the reduction of power consumption and EMI measures.
PLL is not used.
Make the following processing before stopping the MCLK.
ADC Power Down sequence (Figure 5-16.)
DAC Power Down sequence (Figure 5-35.)
Power down HPL driver Page 1 / register 31, bit D7 = 0
Power down HPR driver Page 1 / register 31, bit D6 = 0
Power down class-D drivers Page 1 / register 32, bit D7 = 0
Is there a problem to stop the MCLK ?
Best regards,
Hiroaki Masumoto