TLV320AIC3104 Latency when changing the sample rate on the fly

Hi, Ulrich,

Could you give more details about your question? Do you have an example?

It is suggested to change the sample rate when the ADC/DAC are not in use. If the sample rate is changed with the ADC/DAC in use, it could be a wrong data on DIN/DOUT. It actually wouldn't generate a damage on the device. But the sampled data would be wrong.

Best regards,
Luis Fernando Rodríguez S.

Hi Luis Fernando Rodríguez,

basically the application requires to switch between a telephone audio (8kHz) and audio/media services, that require 44.1-kHz or 48-kHz sample rates.

The I2S data could be ignored until the sample rate is changed. But it would be good to have an idea how quickly I can switch between services (e.g. phone or media).

Hope this helps.

Best regards,

Uli

Hi, Uli,

I have been looking for more information.

It seems that the codec needs some time to be initialized. If you only want to change the sample rate, it would depend of the kind of divider that you will use. The PLL takes more time to be adjusted. It takes approx 10ms.

So, if you want to change the sample rate quickly, I would recommend to use the Q divider instead the PLL. The MCLK frequency would need to be a multiple of the sample rate in order to use this divider. I don't have the specific time to be adjusted but it should be around 1ms.

I hope this helps you. If you still have questions or comments, please let me know.

Best regards,
Luis Fernando Rodríguez S.

Hi Luis Fernando Rodríguez,

Many thanks. As of now I'm happy with the provided answer.

Best regards.

Uli