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TAS57xx MCLK rise/fall time

Andreas Tofahrn
Prodigy 10 points
Other Parts Discussed in Thread: TAS5711

Hi all,

several TAS devices (like TAS5711 in our design) specify rise/fall time for MCLK to be 5nSec max.

If I feed such a steep MCLK (12.288MHz in my case) into the TAS5711, PLL does not lock at all and stays at ~350kHz. Slowing down MCLK a little (at least 7-8nSec rise/fall) immediately provides a safe lock.

Other TAS datasheets do not specify rise/fall for MCLK at all or specify minimum times for high/low levels.

Is it safe to run the device with a slightly slower rising MCLK or do I have to re-check my layout or should that 5nSec from the spec rather read as a minimum time?

Thanks in advance

  • 0
    TI__Guru 57800 points

    Hi, Andreas,

    Welcome to E2E, Thanks for your interest in our products!.

    The maximum rise/fall time spec is relative to the maximum acceptable MCLK frequency (about 10%), so at 24.576MHz, the maximum rise/fall time should be 5ns. When using lower frequencies as in your application (12.288MHz), rise/fall spec could be more flexible, allowing a rise/fall time around 8ns.  

    Best Regards,

      -Diego Meléndez López
       Audio Applications Engineer