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AIC3204 secondary i2s

Alex Savitskiy
Expert 1230 points
Other Parts Discussed in Thread: TLV320AIC3204EVM-K

Hello.

I have TLV320AIC3204EVM-K development board.

The simple functions as recording and playback  works good. But my goal is the next: 

I want  to use codec  with ADC and DAC differ sampling rates. Codec must works in Slave mode.

I read  slaa557 and slaa404c and find the next information:

A typical audio interface bus consists of four signals: the word clock, bit clock, data in (DAC data) and
data out (ADC data). The AIC32x4 has two audio buses, where the primary bus has its signals fixed to the
WCLK, BCLK, DIN, and DOUT pins and the secondary bus and ADC word clock can be routed to
multifunction pins. The ADC word clock (ADC_WCLK) is suitable for cases where the ADC and DAC
sampling rates differ. The audio bus signals can either be supplied by an external processor or generated
by the AIC32x4.

The next picture is shocked me.

Can anybody give me a simple explanation how works and what is needed secondary I2S.

What settings I must use for my schematic diagram.

I am hope for your understanding.

Thanks.

  • 0
    TI__Guru* 84915 points

    Hi, Alex,

    I will try to explain the secondary I2S usage. I hope to be clear.

    The secondary audio processor has the similar behavior of the primary audio processor. Each processor can communicate with the device one at a time. As you may see on the second picture that you attached, there are several ways to route the processors to the external pins. However, the audio digital serial interface block is used to select the clocks and data from one of both processors. For example, you may route the BCLK2 to the GPIO pin. So, the digital audio serial interface can be configured to select between BCLK or S_BCLK (GPIO in this case).

    I hope this helps you. Please let me know if you have more questions or comments.

    Best regards,
    Luis Fernando Rodríguez S.

  • 0 in reply to Luis Fernando Rodriguez S.
    Expert 1230 points

    Hello, Luis,

    Thanks for your answer.

    Today I tired to configure secondary I2S but it doesn't work.

    Please see on the next configuration:

    I am confused  that   S_BCLK Pin is the same as S_DIN Pin

    S_BCLK Pin -> SCLK

    S_DIN Pin -> SCLK

    How to correctly configure MISO and GPIO Control ?

    Thanks.

  • 0 in reply to Alex Savitskiy
    TI__Guru* 84915 points
    Hello, Alex,

    The secondary I2S works similar to the primary I2S. So, the rest of registers (clocks, ADC, DAC, inputs, outputs, etc.) must be configured as well. Did you configure the rest of the codec? Could you provide the entire register configuration?

    Best regards,
    Luis Fernando Rodríguez S.
  • 0 in reply to Luis Fernando Rodriguez S.
    Expert 1230 points

    Hello, Luis,

    My hardware configuration is the next:

    1) ADC and DAC of audio codec  simultaneously works  good  with same FS frequency for ADC and DAC.

    My goal the next: ADC and DAC of audio codec must  be simultaneously  works with differ FS frequency for ADC and DAC. 

    ADC -> 8KHz

    DAC -> 32KHz

    Tell me please is it really to make ?

    Using of secondary I2S  are  needed ?

    2) Can you give me any example for codec configuration for  simultaneously  work  with differ FS frequency for ADC and DAC ?

    My register configuration is attached.

    2063.TI_PAGE_0_REGISTERS.xls

    TI_PAGE_1_REGISTERS.xls

    I am hope for your help.

    Thanks.

  • 0 in reply to Alex Savitskiy
    TI__Guru* 84915 points

    Hi, Alex,

    I have been searching for more useful information for your application. Unfortunately, the ADC and DAC cannot work simultaneously with a different sampling frequency. The reason of this is that both ADC and DAC sampling frequencies are related with the WCLK frequency. Additionally, the secondary and primary I2S cannot work simultaneously as you may see on Figure 2-50 Audio Serial Interface Multiplexing.

    So, it would be necessary to use an audio processor (primary processor) for recording at 8 KHz and the other audio processor (secondary processor) for playback at 32 KHz. However, as I already mentioned, both functions couldn't be done at same time. It would be necessary to enable one of both processors at time.

    Please let me know if you have more questions or comments.

    Best regards,
    Luis Fernando Rodríguez S.