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PurePath digital-digital model for digital interface loopback

Deb
Prodigy 70 points

Other Parts Discussed in Thread: TLV320AIC3254EVM-K

Will the digital loopback going from I2S_in through DSP_D_DSP_A to I2S_out work if the I2S clock is output from the 3254?
  • 0
    TI__Guru* 84915 points

    Hi, Deb,

    I have been doing several tests with the TLV320AIC3254EVM-K. There's no problem, the digital loopback works if the I2S clock is output and input.

    Best regards,
    Luis Fernando Rodríguez S.

  • 0 in reply to Luis Fernando Rodriguez S.
    Prodigy 70 points
    Hi Luis,
    Can I change the configuration of the TAS1020B on AIC3256USBEVM so that it does not drive the CSCLK and CSYNC. I want to drive the BCLK and WCLK from the AIC3256. Also can I change the TAS1020B MCLK01 output to 12MHZ?
    Thanks,
    Deb
  • 0 in reply to Deb
    TI__Guru* 84915 points

    Hi, Deb,

    Unfortunately, this EVM (AIC3256EVM) cannot be configured to receive the BCLK and WCLK signals from the AIC3256. I would suggest to use the AIC3254EVM in this case. It can be used to generate or receive the BCLK and WCLK signals.

    Regarding your question about the MCLK frequency, the frequency cannot be changed on the MCLK. However, the WCLK can be configured to use a different sample rate.

    Best regards,
    Luis Fernando Rodríguez S.