This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TLV320AIC3101 driver for Ambarella A12, Issue: AGC didn't work.

Other Parts Discussed in Thread: TLV320AIC3101

Below is my information, please help check the AGC function how to work, thanks!

Platform: Ambarella A12

Rtos: threadx

Cpu is ARM-cortex-A9

TLV320AIC3101 SW code:

0x00, 0x80, 0x00, 0x10, /* 0 */

0x04, 0x00, 0x00, 0x0a, /* 4 */

0x00, 0x00, 0x00, 0x01, /* 8 */

0x50, 0x00, 0x80, 0x5b,/* 12 */

0x5b, 0xff, 0xff, 0x78, /* 16 */

0x00, 0x80, 0x84, 0x00, /* 20 */

0x78, 0x80, 0xb3, 0xa0, /* 24 */

0x3f, 0xb3, 0xa0, 0x01, /* 28 */

0x77, 0x77, 0xdd, 0xdd, /* 32 */

0x00, 0xc0, 0x00, 0x00, /* 36 */

0x02, 0xa2, 0x84, 0x00, /* 40 */

0x00, 0x00, 0x00, 0x00, /* 44 */

0x00, 0x00, 0x00, 0x5d, /* 48 */

0x00, 0x00, 0x00, 0x00, /* 52 */

0x00, 0x00, 0x5d, 0x00, /* 56 */

0x00, 0x00, 0x00, 0x00, /* 60 */

0x00, 0x5d, 0x00, 0x00, /* 64 */

0x00, 0x00, 0x00, 0x00, /* 68 */

0x5d, 0x00, 0x00, 0x00, /* 72 */

0x00, 0x00, 0x00, 0x00, /* 76 */

0x00, 0x00, 0x00, 0x00, /* 80 */

0x00, 0x00, 0x5d, 0x00, /* 84 */

0x00, 0x00, 0x00, 0x00, /* 88 */

0x00, 0x5d, 0x00, 0x00, /* 92 */

0x00, 0x00, 0x00, 0x00, /* 96 */

0x00, 0x01, 0x02, /* 100 */

  • Hi, Ray,

    The Left ADC seems to be powered down (see Page 0 / Register 19) for details. Additionally, you must be sure that the BCLK and WCLK signals are being provided to the codec.

    Could you give more details about this? Does the rest of the codec work correctly?

    Best regards,
    Luis Fernando Rodríguez S.
  • Hi, Luis,

    We used TLV320AIC3101 in Ambrella/A12 to read and write Register 32 & 33 (AGC gain value), can't write, read out is a constant value 0x60.

    The data sheet shows Register 32 & 33 only can read ( refer as below picture),

    Our products in the S2l platform can be successfully read and write Register  32 & 33 (gain value AGC), the use of codec is TLV320AIC3101.

    please help, thanks!

  • Hi, Ray,

    The applied gain is determined by the AGC, that's why these registers are read-only. You must to program registers 26 and 29 in order to determine the AGC target level. Once this value is configured, you may program a maximum gain that the AGC can reach with registers 27 and 30. The AGC will try to reach the target level based on the programmed maximum gain.

    Best regards,
    Luis Fernando Rodríguez S.