I have a product design with the AIC3204, where about 5% of the boards report an over current on DVdd (Page 1, Register 2, Bit 2). I could just ignore this bit, but I am worried that it is a symptom of a larger problem.
I have a few questions.
1) What is the current threshold to trip this bit?
2) What can I do to reduce the current so as not to cause the trip?
I am powering LDO_IN and IOVdd, but relying on the AIC to power AVdd and DVdd. Each of these is bypassed by 10.1 uF.
Thanks,
Bill