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AIC3263 | miniDSP_A and miniDSP_D cycles

divhkk
Intellectual 310 points


Hi,

We use the framework AIC3263App8x4x. We have SynchMode enabled and our sampling rate is 16k Hz. 

The accepted range for miniDSP_A and miniDSP_D cycles as per PurePath Studio properties window is: 256 to 6144. But things don't seem to work for us if the value is greater than 3000. The microphone output is zero when cycles >3000. 

Could you please help identify the issue.

What are all the factors that limit the minidsp cycles?

Are there any issues that may arise if cycles is too high?

Thank you.

  • 0
    TI__Guru* 84915 points
    Hi,

    I suggest to take a look at this wiki article:

    e2e.ti.com/.../1098.aic3254-minidsp-d-cycles-and-minidsp-a-cycles

    It contains information about the miniDSP cycles and some of the restrictions.

    In general, the max number of cycles per frame depends on the frequency of miniDSP_CLK. Also, the interpolator and decimator determines the limit of cycles allowed. So, we recommend to try with another interpolator and decimator blocks.

    Best regards,
    Luis Fernando Rodríguez S.
  • 0 in reply to Luis Fernando Rodriguez S.
    Intellectual 310 points

    Hi,

    Thanks for the link. It determines the minimum, but the maximum limit is still not clear. 

    Luis Fernando Rodríguez S. said:


    In general, the max number of cycles per frame depends on the frequency of miniDSP_CLK. Also, the interpolator and decimator determines the limit of cycles allowed.
    Could you please elaborate on this?
    I understand this is how miniDSP clk is calculated:
    ADC_miniDSP_CLK = ADC_CLK / ((MADC x AOSR)/IADC)
    DAC_miniDSP_CLK = DAC_CLK / ((MDAC x DOSR)/IDAC) 
    What is the maximum limit for the miniDSP clock?
    The CodecControl software has a clock calculator with a property called DSP OSR. Is DSP OSR same as AOSR and DOSR ?
    Also, would you recommend using or not using the Sync mode for miniDSP? 
    Thank you.
  • 0 in reply to divhkk
    TI__Guru* 84915 points

    Hi, 

    The maximum limit for the miniDSP clock would depend of the DVDD voltage. Please take a look at picture below for details:

    Effectively, DSP OSR would be the same as AOSR/DOSR.

    Regarding your question about the Sync mode, this mode is suggested when there's a data transmission from miniDSP_A to miniDSP_D or vice versa. Sync mode will ensure that both miniDSP have the same clock source, avoiding phase or delay issues. Please use Sync Mode in these cases.

    Best regards,
    Luis Fernando Rodríguez S.