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TLV320AIC3254 - signal discontinuity when changing Mic PGA gain

Robert Wolfe
Mastermind 7860 points
Other Parts Discussed in Thread: TLV320AIC3254

Hello,

I am sampling the TLV320AIC3254 for some time, then adjusting the left Mic PGA gain on the fly, via register page 1, register 59.  When doing so, I'm seeing a discontinuity in the waveform, as shown by the attached picture.  Is this expected?  It's causing problems with our algorithms, so hopefully it is either something I'm doing wrong, or there is a way to correct it.

Regards,

Robert

  • 0
    TI__Guru* 84915 points
    Hi, Robert,

    Could you provide your entire register configuration before and after change the PGA gain? This is to have a better approach to this issue.

    Thank you.

    Best regards,
    Luis Fernando Rodríguez S.
  • 0 in reply to Luis Fernando Rodriguez S.
    Mastermind 7860 points
    Luis,

    I'm working on this, debugging a routine I have that reads all the codec registers; so they can be provided to you (and to also confirm to myself they are as expected during run-time).

    I wouldn't think so, but it's worth asking: is there any easier way to get those codec register values, maybe through Code Composer?

    Thanks,
    Robert
  • 0 in reply to Robert Wolfe
    Mastermind 7860 points

    Luis,

    I've fixed my routine that dumps the registers from the codec.  Attached are four files:

       page.0.before.txt is the page 0 registers before I update the left MICPGA volume control

       page.1.before.txt is the page 1 registers before I update the left MICPGA volume control

       page.0.after.txt is the page 0 registers after I update the left MICPGA volume control

       page.1.after.txt is the page 1 registers after I update the left MICPGA volume control.

    They are read simply as the row number in the file corresponds to the associated register number.

    When I look at the differences between the before and after files, I see two changes.  First is the change from 0x0 to 0xc in page 1, register 59 ... as mentioned, the left MICPGA change I make, which causes the discontinuity.  And I see register 46 in page 0 going from a value of 0x4 before the change, to a value of 0 after.

    Please review.

    Robert

    Fullscreen page.0.after.txt Download 
    0000
0000
0050
0000
0000
0011
0004
0000
0000
0000
0000
0083
0085
0000
0080
0002
0000
0008
0083
0085
0080
0001
0000
0004
0000
0002
0081
0030
0000
0000
0000
0000
0000
0000
0000
0000
00CC
00AA
0011
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0010
0012
0002
0000
0000
0000
0000
0000
0019
0001
0000
00D6
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
00EE
0010
00D8
007E
00E3
0000
00C3
0000
0000
0000
0000
0000
0000
007F
0000
0000
0000
0000
0000
0000
0000
007F
0000
0000
0000
    Fullscreen page.1.before.txt Download 
    0001
0008
0001
0000
0000
0000
0000
0000
0000
0033
0000
0010
0008
0008
0000
0000
0000
0000
0040
0040
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0020
0000
0020
0080
0000
0020
0030
0000
0000
0000
0003
00C0
0000
0000
0000
0000
0000
0000
0000
0032
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
    Fullscreen page.1.after.txt Download 
    0001
0008
0001
0000
0000
0000
0000
0000
0000
0033
0000
0010
0008
0008
0000
0000
0000
0000
0040
0040
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0020
0000
0020
0080
0000
0020
0030
000C
0000
0000
0003
00C0
0000
0000
0000
0000
0000
0000
0000
0032
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
    Fullscreen page.0.before.txt Download 
    0000
0000
0050
0000
0000
0011
0004
0000
0000
0000
0000
0083
0085
0000
0080
0002
0000
0008
0083
0085
0080
0001
0000
0004
0000
0002
0081
0030
0000
0000
0000
0000
0000
0000
0000
0000
00CC
00AA
0011
0000
0000
0000
0000
0000
0004
0000
0000
0000
0000
0000
0000
0000
0010
0012
0002
0000
0000
0000
0000
0000
0019
0001
0000
00D6
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
00EE
0010
00D8
007E
00E3
0000
00C3
0000
0000
0000
0000
0000
0000
007F
0000
0000
0000
0000
0000
0000
0000
007F
0000
0000
0000

  • 0 in reply to Robert Wolfe
    TI__Guru* 84915 points

    Hi, Robert,

    I didn't observe any issue from my side. Additionally, I didn't get your same result in page 0 / register 46: I got '0' in both configurations (before/after).

    So, I would recommend few things:

    - Make sure that all the power supplies are provided correctly. Ensure that there are no high ripple and the decoupling capacitors are placed close to the device.

    - Please follow the steps of 2.3.3.3 ADC Setup section. Ensure that the register programming sequence is being followed correctly.

    - Disable MAL/MAR connections (Page 1 /Registers 24 & 25). It seems that they are not being used.

    Additionally, could you provide your schematic to verify that it is not due to a hardware issue.

    Thank you.

    Best regards,
    Luis Fernando Rodríguez S.

  • 0 in reply to Luis Fernando Rodriguez S.
    Mastermind 7860 points

    Luis,

    I'm in the process of reviewing all suggestions.  Turning off MAR/MAL didn't help.  The schematic is IP-sensitive, so couldn't be disclosed on a public website.  I can say that it was reviewed by TI, when first designed, without any flags related to the codec.  But I'd be happy to have another review of it, if you wouldn't mind.  I think my local rep could get it in your hands.  

    We may have capacitors close to the codec, however.  How do you think this might be contributing to the discontinuity found in the signal?

    Thanks,

    Robert

    P.S.  I did try to follow the steps of 2.3.3.3, but will review further.

  • 0 in reply to Robert Wolfe
    Mastermind 7860 points
    Hi Luis,

    I found the source of this problem, or at least a work around. The change being made to the AIC register, to increase the gain on the MicPGA, was applied within a hardware interrupt. It has the logic to know when the gain change is needed, plus has to make adjustments to downstream processing, once the change is made. However, I recognized the discontinuity was from the HW INT being held off, since the data being displayed is captured there. So it appears the act of writing (and reading) from the AIC was causing HW INT misses. To resolve, I moved the actual AIC update to a lower priority task, which gets triggered from the HW INT. The concern was that the lower priority task would delay in making the change, and I wouldn't be able to synchronize it with needed changes in the HW INT. But that either wasn't the case, or was recoverable by our logic. Either way, it's a path forward, at least for now.

    But we'd still be ok with a review of the schematic forwarded to you, when you have time.

    Thanks,
    Robert
  • 0 in reply to Robert Wolfe
    TI__Guru* 84915 points
    Hi, Robert,

    I already reviewed the schematic. It was all in order. I just recommended to connect the thermal pad to the analog ground plane. It is used to dissipate the power consumption of the analog activity (such headphone driver).

    Best regards,
    Luis Fernando Rodríguez S.
  • 0 in reply to Luis Fernando Rodriguez S.
    Mastermind 7860 points

    Ok Luis, we will do that.  Thanks for your help.

    Robert