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TLV320DAC3100: Excessive current at SPK output when cold start

Part Number: TLV320DAC3100

Hi all,

My customer has faced the problem about the excessive current at SPK out when turning on the system power like cold start.
At the -30-dec C, the excessive current is getting large and the system is shutdown.
At the room temp or +70-deg C, there is some excessive current (not so large) during about 130ms but the system is not shutdown. 

When turning the power back on immediately, there is no excessive current .

Is there any solution for resolving this problem?
Currently their development stage is almost final, and they can modify only the register setting.  

The speaker impedance is 8-ohm.

The setting value to registers is as follows;

 

 0x00      0x00     // Select Page 0

 0x01,     0x01     // RESET

 0x04,     0x03     // PLL_clkin = MCLK,codec_clkin = PLL_CLK

 0x06,     0x08     // J = 8

 0x07,     0x00     // D = 0000, D(13:8) = 0, D(7:0) = 0

 0x08,     0x00     // PLL D-Value LSB

 0x05,     0x91     // PLL Power up, P = 1, R = 1

 0x0b,     0x88     // NDAC is powered up and set to 8

 0x0c,     0x82     // MDAC is powered up and set to 2

 0x0d,     0x00     // DOSR = 128, DOSR(9:8) = 0, DOSR(7:0) = 128

 0x0e,     0x80     // DAC DOSR_VAL LSB

 0x1b,     0x00     // mode is i2s, wordlength is 16, slave mode

 0x74,     0x00     // DAC => volume control thru pin disable

 

 0x00      0x01     // Select Page 1

 0x1E,     0x02     // SPK power-up control bits remain unchanged on

                    // short-circuit detection.

 0x1f,     0x04     // (b) Program common-mode voltage (defalut = 1.35 V)

 0x21,     0x4e     // De-pop, Power on = 1.22s, Step time = 4 ms 

 0x23,     0x40     // LDAC routed to HPL out, RDAC not routed anywhere

 0x28,     0x02     // Unmute HPL, set gain = 0 db

 0x29,     0x02     // Unmute HPR, set gain = 0 dB

 0x2a,     0x1c     // Unmute Class-D, set gain = 24 dB

 0x20,     0x86     // Power-up Class-D driver

 0x24,     0x00     // Enable HPL output analog volume, set = -9 dB

 0x25,     0x00     // Enable HPR output analog volume, set = -9 dB

 0x26,     0xFF     // Enable Class-D output analog volume, set = ** dB <--

   0x00      0x00     // Select Page 0

 0x3f,     0x90     // Powerup DAC left channels (soft step enabled)

 0x41,     0x00     // DAC Left gain = 0 dB

 0x42,     0xd4     // DAC Right gain = -22 dB

 0x40,     0x04     // UnMute DAC left and right channels

 0x19,     0x00     // CDIV_CLKIN = MCLK (default)

 0x1a,     0x81     // CLKOUT divider M = 1, CLKOUT M --> power on

 0x33,     0x10     // Set GPIO to CLKOUT

Regards,
Toshi

  • Hi, Toshi,

    Excuse me, could you verify if customer has the same issue if the speaker is disconnected? This is to have a better approach to this issue.

    Best regards,
    Luis Fernando Rodríguez S.
  • Hi Luis-san,
    Thanks for your support.
    I will ask my customer to confirm that the same thing happens if the speaker is removed.
    However, it is impossible to remove the speaker as their application when cold start.
    So I would like to ask you to look for other solutions.

    Best regards,
    Toshi
  • Hi Luis-san,
    My customer confirmed that there was no issue when the speaker was removed.

    This problem is happened when the register value of analog volume (P1/R38) was changed from 0x0FF (-78.3dB) to some other value like 0x080 (0dB) with a soft-stepping feature.
    If the register value of analog volume (P1/R38) is not changed, there is no excessive current.
    Only this problem is happened when a cold start like over 30sec later from the power off of system.

    In order to avoid this problem, what kind of procedure should I set the analog volume?

    Best regards,
    Toshi
  • Hi, Toshi-san,

    This seems to be related with a short-circuit in the Class-D output. Could customer verify the device detects a short-circuit with Page 1 / Register 32? Additionally, could customer verify if the speaker that he is using can operate at these temperatures?

    Best regards,
    Luis Fernando Rodríguez S.
  • Hi Luis-san,

    Thanks for your support.

    They have already confirmed this phenomenon by connecting 8 ohm register  instead of a speaker.
    This phenomenon is confirmed only when the first activating analog volume after turning on the power supply.

    Please refer to the below observed waveform.The duty ratio of SPKP and SPKM seems to generate some DC level like an offset.

    Best regards,
    Toshi

  • Hi, Toshi-san,

    Thank you for confirm the phenomenon with a 8-ohm resistor.

    I would recommend to make more tests. Could customer try using another 5V power supply at SPKVDD? Particularly, could customer try using another 5V power supply that could drive more current than the actual power supply? This could give us a better approach to this issue.

    Finally, is it possible to provide some captures of the SPKP and SPKM outputs when the issue appears?

    Thank you.

    Best regards,
    Luis Fernando Rodríguez S.

  • Hi Luis-san,

    Thanks for your support.

    My customer confirmed that the reset phenomenon at -30-deg C was not occurred when using external 5V power supply at SPKVDD. However still there is the excessive current at SPK out when cold start.
    Is it necessary more powerful power supply for SPKVDD?

    If they could not change the H/W at this time, is there any other solution? 

    Best regards,
    Toshi

  • Toshi-san,

    Thank you for the test results.

    I'm wondering if the low temperature is modifying the load resistance. Could you verify if the speaker resistance is still the same at low temperatures? Could customer try with higher load resistance to verify if this is related with a load problem?

    Thank you.

    Best regards,
    Luis Fernando Rodríguez S.

  • Hi Luis-san,
    They tried with 16-ohm load resistance at room temperature, and confirmed the load current was halved.
    But they did not try it at the low temperature yet.

    Anyway, they found the register setting procedure to avoid the excessive current.

    They add the below procedure before proceeding previous setting.

    ==============================
    0x01, 0x01 // RESET
    0x3f, 0x90 // Powerup DAC left channels (soft step enabled)
    0x1a, 0x81 // CLKOUT divider M = 1, CLKOUT M --> power on
    0x33, 0x10 // Set GPIO to CLKOUT
    ==============================

    Will it be a clue to clarify the cause by this?
    I hope that it becomes a clue to solving by register setting procedure.

    Regards,
    Toshi
  • Toshi-san,

    Does this procedure avoid excessive current all the time?

    Are both DAC channels un-muted in this procedure? Which dB gain is accepted before the fail?

    Best regards,
    Luis Fernando Rodríguez S.
  • Hi Luis-san,
    There is no unmuted procedure .

    They reported that when they repeatedly tested this method, there were cases where the phenomena were improved and cases where there was no effect. So that this proved incomplete as a result.

    Best regards,
    Toshi
  • Hi, Toshi-san,

    Could you provide the the layout design files, please? You may contact me via e2e chat in case of sensitive information. I think that this should be related with the power dissipation.

    Best regards,
    Luis Fernando Rodríguez S.
  • Hi Luis-san,
    Thanks for your kind support.

    My customer reported that when changing the value of P0/R63 from 0x90 to 0xA2, there is no the excessive current at cold start.

    The setting contents are as follows;
    - Left-channel DAC is powered up
    - Right-channel DAC is powered down.
    - Left-channel DAC data path = right data
    - Right-channel DAC data path = off
    - DAC-channel volume-control soft-stepping is disabled.

    When setting P0/R63 = 0x92 or 0xA0, the phenomenon could not be improved.

    I do not know why this setting has any effect, but could you explain it if you know the reason?

    Best regards,
    Toshi
  • Hi, Toshi-san,

    I think that the configuration above has less power consumption. Soft-stepping require more current consumption. If it is disabled, the device should be consuming less power. Then, do you know if there are differences in the right and left data? Probably, the right data has lower consumption than the left data.

    Regarding the layout files, could you send me them in order to have a better approach to this issue?

    Thank you.

    Best regards,
    Luis Fernando Rodríguez S.
  • Hi Luis-san,

    Sorry for my lack of explanation.
    The right and left data are the same.
    I confirmed that the I2S data is zero when the first analog volume is set after turning on the power. Therefore, the data of the DAC is zero.
    After that the some audio data is sent to TLV320DAC3100.

    Anyway, I will try to get the layout from them.

    Best regards,
    Toshi
  • Thank you, Toshi-san,

    I will wait for the layout files. They will be helpful to understand the DAC behavior.

    Best regards,
    Luis Fernando Rodríguez S.
  • Luis-san,
    I got the layout (pdf file) from my customer. I would like to send it to you directly.

    Could you tell me your e-mail address?

    Best regards,
    Toshi

  • Toshi-san,

    Please send me the files via E2E private message.

    Best regards,
    Luis Fernando Rodríguez S.
  • Toshi-san,

    The layout seems to be correct. The thermal pad is connected correctly.

    Could customer try replacing this part with a new one? Probably the unit was damaged and doesn't work properly.

    Best regards,
    Luis Fernando Rodríguez S.
  • Luis-san,
    Thanks for checking the layout.
    I was relieved that there was no problem with their designed layout.

    Although there is a difference in degree, this phenomenon occurs in all 10 prototypes.
    So, I think there is no problem with IC.

    Best regards,
    Toshi
  • Toshi-san,

    In past posts you mentioned a register configuration procedure that eliminates this issue. Does this procedure eliminate this phenomenon in all the prototypes?

    Best regards,
    Luis Fernando Rodríguez S.
  • Luis-san,
    Sorry for my delayed answer.

    As a result of various trials, when an analog function is activated, something like an offset is generated.
    So, I thought that the state of the register of the DAC after turning on the power may be undefined.
    Therefore, before activating the analog part, I tried the procedure to send the dummy data thru I2S to clear the register of DAC to TLV320DAC3100.
    The phenomenon was solved and the problem ceased.
    Thank you very much for your kind help.

    Best regards,
    Toshi