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CCS/TAS5756M: TAS5756M register initial setup

Part Number: TAS5756M


Tool/software: Code Composer Studio

Following question:
What's the configure steps for the TAS5756m chips?
We find through the Purepath Console that there seems to be a few steps to build up the audio settings.
And after we follow the steps, this software created a few files, including the Init_98.cfg.
I am wondering if this is the right initialization file for the chips. Can you help tell what steps are doing?
By the way, we were passed a file in the attachment (3 wire I2S... .txt), can you help tell us where this file is and how we can use it?
Thanks!


!3wire mode
!System Clock PLL mode with NO SCLK input mode. Provide supply voltages(3.3V). Don't provide I2S clocks yet.
! Write 0x00 at address=0x00 via I2C. (Go to page.0)
X00 00
! Write 0x10 at address=0x02 via I2C. (Standby request)
X02 10
! Write 0x5A at address=0x25 via I2C. (Ignore SCLK hault detector, Ignore SCLK detection, disable auto divider settings, ignore fs detection)
X25 5A
! Write 0x10 at address=0x0D via I2C. (PLL clock source => BCLK)
X0D 10
! Write 0x00 at address=0x14 via I2C. (P=1 for PLL divider)
X14 00
! Write (0x10 for BCLK=64fs, 0x20 for BCLK=32fs note that L&R 32 bit = 32*2=64) at address=0x15 via I2C. (J=16/32 for PLL divider)
X15 10
! Write 0x00 at address=0x16 via I2C. (D1=0 for PLL divider)
X16 00
! Write 0x00 at address=0x17 via I2C. (D2=0 for PLL divider)
X17 00
! Write 0x01 at address=0x18 via I2C. (R=2 for PLL divider)
X18 01
! Write 0x01 at address=0x1B via I2C. (miniDSP CLK divider = 2)
X1B 01
! Write 0x0F at address=0x1C via I2C. (DAC CLK divider = 16)
X1C 0F
! Write 0x03 at address=0x1D via I2C. (NCP CLK divider = 4)
X1D 03
! Write 0x07 at address=0x1E via I2C. (OSR CLK divider = 8)
X1E 07
! Write 0x00 at address=0x22 via I2C. (Interpolation filter = 8x, fs setting = 48kHz)
X22 00
! Write 0x04 at address=0x23 via I2C. (IDAC = 1024 cycles)
X23 04
! Write 0x00 at address=0x24 via I2C. (IDAC = 1024 cycles)
X24 00
! Write 0x00 at address=0x02 via I2C. (Standby release)
X02 00
! Provide I2S clocks (SCLK : Tie to 0, LRCLK : 44.1kHz/48kHz, BCLK : 32fs/64fs)

  • Hi Minjie, 

    The TAS5756M is able to operate without further configuration after powers supplies are stable and valid clocks are provided. If 3-wire I²S mode is preferred, you can let the device to autoconfigure the internal clock tree. In general, you only need to configure the following registers to make the amplifier operate in 3-wire I²S mode:

    # Set up 3-wire I²S
    w 98 25 18  #Enable clock auto set and ignore SCK detection
    w 98 0D 10 #Configure BCLK as PLL Source

    It seems the picture you tried to upload was corrupted, could you please re-upload it?. 

    Best Regards,

      -Diego Meléndez López
       Audio Applications Engineer