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TAS2505: To put the device TAS2505 in standby mode

Part Number: TAS2505

To put the device TAS2505  in standby mode,Which registers are required? What are the parameters?How to operate from Standby mode to work mode?

  • Hi David,

    The standby mode refers to the state when most of the internal blocks are powered down while the device is still powered.
    DAC can be powered down through page 0 register 0x3F bit 7. Speaker Amplifier can be powered down through page 1 register 0x2D bit 1. PLL can be powered down through page 0 register 0x05 bit 7. Level shifters can be controlled through page 1 register 0x02.

    Best regards,
    -Ivan Salazar
    Texas Instruments
  • dear Ivan:

                Enter standby mode register configuration:

    static const unsigned char TxData1[] ={   // Px, P1              Switch to Page 1
                                                                     0x00, 0x01,  
                                                                    // LDO Control Register   // P1, R2, b5-4.       AVDD LDO Output = 1.8V   // P1, R2, b3.         PLL and HP Level Shifters = Power down
                                                                     0x02,0x08,
                                                                   // Px, P0              Switch to Page 0  
                                                                   0x00, 0x00,
                                                                 // Clock Setting Register 2 - PLL P and R Values   
                                                                 // P0, R5, b7.         PLL = Power down (0)
                                                                // P0, R5, b6-4.       PLL Divider P = 1
                                                               // P0, R5, b3-0.       PLL Divider R = 1  
                                                               0x05, 0x14,   
                                                             // Clock Setting Register 11 - NDAC Values
                                                            // P0, R11, b7.        NDAC = Power down   
                                                          // P0, R11, b6-0.      NDAC = 3 (DAC_CLK = CODEC_CLKIN / NDAC)
                                                             0x0B, 0x03,  
                                                            // Clock Setting Register 12 - MDAC Values
                                                            // P0, R12, b7.        MDAC = Power down  
                                                          // P0, R12, b6-0.      MDAC = 8 (DAC_MOD_CLK = DAC_CLK / MDAC)   
                                                          0x0C, 0x08,    
                                                              // Px, P1              Switch to Page 1  
                                                         0x00, 0x01,   
                                                        // REF, POR and LDO BGAP Control Register
                                                       // P1, R1, b4.         Master Reference = Power down   
                                                        // P1, R1, b3.         POR Power Control = Power down   // P1, R1, b1.         LDO Bandgap = Power down   
                                                      0x01, 0x08,  
                                                     // Speaker Amplifier Control 1  
                                                     // P1, R45, b1.        Spk Driver = Power Up/Reset   0x2D, 0x00,   
                                                      // Px, P0              Switch to Page 0   0x00, 0x00,  
                                                      // DAC Channel Setup Register 1  
                                                     // P0, R63, b7.        DAC Power = Power Up
                                                     // P0, R63, b5-4.      DAC Path = Mix of L+R   
                                                     // P0, R63, b1-0.      Soft-Step Control = 1 step/WCLK   
                                                    0x3F, 0x34, };
     
    Current test value is 1.7mA,By modifying the register configuration, I can enter the operating mode from the standby mode,
     
    stanyby wake  up:
    static const unsigned char TxData2[] ={   // Px, P1              Switch to Page 1   0x00, 0x01,   // LDO Control Register   // P1, R2, b5-4.       AVDD LDO Output = 1.8V   // P1, R2, b3.         PLL and HP Level Shifters = Power Up   0x02, 0x04,       // Px, P0              Switch to Page 0   0x00, 0x00,   // Clock Setting Register 2 - PLL P and R Values   // P0, R5, b7.         PLL = Power Up (1)   // P0, R5, b6-4.       PLL Divider P = 1   // P0, R5, b3-0.       PLL Divider R = 1   0x05, 0x94,    // Clock Setting Register 11 - NDAC Values   // P0, R11, b7.        NDAC = Power Up   // P0, R11, b6-0.      NDAC = 3 (DAC_CLK = CODEC_CLKIN / NDAC)   0x0B, 0x83,   // Clock Setting Register 12 - MDAC Values   // P0, R12, b7.        MDAC = Power Up   // P0, R12, b6-0.      MDAC = 8 (DAC_MOD_CLK = DAC_CLK / MDAC)   0x0C, 0x88,     // Px, P1              Switch to Page 1   0x00, 0x01,   // REF, POR and LDO BGAP Control Register   // P1, R1, b4.         Master Reference = Power Up   // P1, R1, b3.         POR Power Control = Power Up   // P1, R1, b1.         LDO Bandgap = Power Up   0x01, 0x10,     // Speaker Amplifier Control 1   // P1, R45, b1.        Spk Driver = Power Up/Reset   0x2D, 0x02,     // Px, P0              Switch to Page 0   0x00, 0x00,   // DAC Channel Setup Register 1   // P0, R63, b7.        DAC Power = Power Up   // P0, R63, b5-4.      DAC Path = Mix of L+R   // P0, R63, b1-0.      Soft-Step Control = 1 step/WCLK   0x3F, 0xB4, };
    If there is no operation, Wait 5 minutes later,Current test value is 100uA,but Need to initialize all registers before entering the operating mode,
     
    My question is:
     
    1、Why does it appear The phenomenon described above
    2、How long to enter standby mode current can reach 100uA.
    3、Why do you need to initialize all registers to get to work mode
     

    Best regards,