Need help with the TAS5615

Hi, Lorena,

Try turning off the reset and then slowly applying the input signal. Do not jam a huge peak-to-peak signal into the inputs, especially while the amp is starting up. Slowly increase the amplitude, and I think your failures should go away.

-d2

Lorena, I have reviewed your schematic and PCB layout and thought about what you have said before.  If I have understood you correctly, the following is true.

- The TAS5615 is damaged when you take it out of RESET (that is, setting the /RESET line high).  This happens whether you are applying input signal or not.

Is that correct?

I will try to comment on your schematic and PCB layout, because the answer may be there.

- SCHEMATIC:  I think you have tried to copy the TI EVM schematic.  The resolution in the schematic you sent us is not good, so I cannot be sure, but it seems so.

I cannot tell what components you are using, because I do not have a BOM.  I am most concerned about all of the PVDD decoupling caps and the LC filter components, especially the inductors and 680nF caps.  Can you provide a BOM with data sheets for these components?

(I think the inductors may be a problem, because they appear rather small.  This suggests they may saturate and lose much of their inductance even during startup.  I think the 680nF caps may be a problem, because they appear to be 0805 or 0603 ceramics.  Caps like that do not meet the specifications of the metal film caps we use in our EVMs, and they are not so likely to behave well in the LC filter.)

- PCB LAYOUT:  The layout does not implement many of the important features of our EVM PCB layout.  These are shown in the EVM, of course, but they are also described in the section of the data sheet called "PRINTED CIRCUIT BOARD RECOMMENDATION" on pages 24-26 of SLAS595B.

The most troubling item might be that it seems there is no ground to the heatsink for TAS5615.  Maybe it is there and I cannot see it.  It is vital to ground the heatsink to help control substrate currents.

The ground plane is not wired to the device or the 2.2uF decoupling caps as strongly as in the EVM.  The EVM puts an array of vias under the device, including several directly at the PGND pins, to tie the local grounds of the device very strongly to the ground plane.  The EVM also puts 4 vias directly at the ground terminals of the 2.2uF caps to tie them strongly to the ground plane.  This layout creates very low ground impedance at the device to minimize output and power supply switching transients that could otherwise could damage it.  Your layout does not have grounding that is nearly as strong.

I hope this can help you correct the problem you're facing.

Best regards,

Steve.

Lorena, thank you for the schematic - it is much better.  Regarding the components, I think I can tell which inductor and capacitor you mean, but please confirm part numbers for me so I am sure.

If the cap is the 1210 680nF 100V on page 22, I do not see a big problem with it, at least for stability.  High-K capacitors generally have high sensitivity to applied voltage, and they tend to lose a significant percentage of their capacitance with voltages hear their ratings.  But I recommend using X7R material with voltage rating twice the power supply voltage, and you appear to have chosen that already.  (Stay away from Y5V - at its rated voltage it tends to lose 80% of its nominal capacitance, or maybe even more.)

I can't be sure about the inductor, because all that is listed is the 5A "Rated Current", which is probably a thermal rating.  What's important for stability is saturation current, which is not given.  TAS5615 requires a minimum of 14uH to be able to maintain OCP.  Without that output current may rise so quickly that the OCP circuit cannot detect it soon enough to prevent damage.  Of course, inductance of a nominal 15uH inductor can fall much lower as it saturates.

Regarding PCB layout, please first try grounding the heatsink.  This is important for limiting substrate bounce, and it may make a big difference.

Next, you might temporarily replace the inductors with inductors from a TAS5615 EVM.  Those are good to 15A.

Finally, it would be possible to simulate adding vias by drilling a pattern of small holes under the device and connecting through them with very fine wire.  The chip package has only 0.15mm clearance underneath, so wire diameter would have to be less than 0.15mm diameter, AWG 35 / metric 1.4 or smaller.  This could take some work but it could be done, more quickly and cheaply than modifying the layout and fabricating new assemblies.

Best regards,

Steve.

Lorena, I think it is difficult to reproduce the grounding under the chip in the EVM, especially at the AGND+GND and PGND pins.  This grounding is important in any high voltage and current device like TAS5615.  If grounding is not very strong, the different grounds of the chip can bounce with respect to each other, and of course this can cause damage.

I have 2 other thoughts.

- When you say there is "no input signal", do you mean the input is disconnected, or the PWM stream is turned off?  Or do you mean the PWM stream is driving the input but there is no audio content?

- Can you compare what you are doing to one of our EVMs?  Of course, the grounding in the EVM is what we recommend, so that would not be an issue.

Best regards,

Steve.