Hi,
i configure AIC3204 like this:
; Point to page 0
AC1 = #0
AR1 = #0x0
call i2c_WriteData8
;reset codec
AC1 = #1
AR1 = #0x1
call i2c_WriteData8
; Point to page 1
AC1 = #0
AR1 = #0x1
call i2c_WriteData8
;Disable crude AVDD generation from DVDD
AC1 = #1
AR1 = #0x08
call i2c_WriteData8
;Enable Analog Blocks and LDO
AC1 = #2
AR1 = #0x01
call i2c_WriteData8
;***********************************************************************
;* PLL and Clocks config and Power Up
;***********************************************************************
; Point to page 0
AC1 = #0
AR1 = #0x0
call i2c_WriteData8
;AIC is master running off of 1.288 MHz crystal
;BCLK and WCLK is set as op to AIC3204(Master) - 16 bits word
AC1 = #27
AR1 = #0x0D
call i2c_WriteData8
;PLL setting: PLLCLK <- MCLK and CODEC_CLKIN <-PLL CLK
AC1 = #4
AR1 = #0x03
call i2c_WriteData8
;PLL Power up; PLL Divider params: P = 1, R = 1
AC1 = #5
AR1 = #0x91
call i2c_WriteData8
;PLL setting: J=8
AC1 = #6
AR1 = #0x08
call i2c_WriteData8
;PLL setting: HI_BYTE(D) for D=0x0780 (or 1920 decimal)
AC1 = #7
;AR1 = #0x07
AR1 = #0x00
call i2c_WriteData8
;PLL setting: LO_BYTE(D) for D=0x0780
AC1 = #8
;AR1 = #0x80
AR1 = #0x00
call i2c_WriteData8
;NDAC = 2
AC1 = #11
AR1 = #0x82
call i2c_WriteData8
;MDAC = 8
AC1 = #12
AR1 = #0x88
call i2c_WriteData8
;DOSR H (DOSR = 32)
AC1 = #13
AR1 = #0x00
call i2c_WriteData8
;DOSR L (DOSR = 32)
AC1 = #14
AR1 = #0x20
call i2c_WriteData8
;Clock Setting Register 11, BCLK N Divider N = 7
AC1 = #30
AR1 = #0x87
call i2c_WriteData8
;Power up NADC and set NADC value to 2
AC1 = #18
AR1 = #0x82
call i2c_WriteData8
;Power up MADC and set MADC value to 8
AC1 = #19
AR1 = #0x88
call i2c_WriteData8
;AOSR for AOSR = 32
AC1 = #20
AR1 = #0x20
call i2c_WriteData8
; Point to page 0
AC1 = #0
AR1 = #0x0
call i2c_WriteData8
; DAC PRB
AC1 = #60
AR1 = #21
call i2c_WriteData8
; ADC PRB
AC1 = #61
AR1 = #0x0E
call i2c_WriteData8
;***********************************************************************
;* DAC ROUTING and Power Up
;***********************************************************************
;Select page 1
AC1 = #0
AR1 = #0x01
call i2c_WriteData8
;LDAC AFIR routed to HPL
AC1 = #12
AR1 = #0x08
call i2c_WriteData8
;RDAC AFIR routed to HPR
AC1 = #13
;AR1 = 0x08
AR1 = #0x00
call i2c_WriteData8
;Select page 0
AC1 = #0
AR1 = #0x00
call i2c_WriteData8
;Left vol=right vol
AC1 = #64
AR1 = #0x02
call i2c_WriteData8
;Left DAC gain to 0dB VOL; Right tracks Left
AC1 = #65
;AR1 = #0x00 ; without DRC
AR1 = 0x18 ; with DRC
call i2c_WriteData8
; DRC
;DAC => DRC Enabled for left channels, Threshold = -24 db, Hysteresis = 3 dB
AC1 = #0x44
AR1 = #0x5F
call i2c_WriteData8
;DRC Hold = 0 ms, Rate of Changes of Gain = 0.5 dB/Fs'
AC1 = #0x45
AR1 = #0x00
call i2c_WriteData8
;Attack Rate = 1.9531e-4 dB/Frame , DRC Decay Rate =2.4414e-5 dB/Frame
AC1 = #0x46
AR1 = #0xB6
call i2c_WriteData8
; END DRC
;Power up left,right data paths and set channel
AC1 = #63
;AR1 = #0x92
AR1 = #0xB2
call i2c_WriteData8
;Select page 1
AC1 = #0
AR1 = #0x01
call i2c_WriteData8
;Unmute HPL , 0dB gain
AC1 = #16
AR1 = #0x00
call i2c_WriteData8
;Mute HPR , 0dB gain
AC1 = #17
AR1 = #0x00 ;#0x40
call i2c_WriteData8
;Power up HPL
AC1 = #9
;AR1 = 0x28 -- prec
AR1 = #0x30
call i2c_WriteData8
;Select page 0
AC1 = #0
AR1 = #0x00
call i2c_WriteData8
@BRC0_L = #0x02FF || mmap()
localrepeat {
repeat(#0xFFFF)
NOP_16
NOP_16
}
;***********************************************************************
;* ADC ROUTING and Power Up
;***********************************************************************
;Select page 1
AC1 = #0
AR1 = #0x01
call i2c_WriteData8
AC1 = #52
AR1 = #0x30
call i2c_WriteData8
;CM_1 (common mode) to LADC_M through 40 kohm
AC1 = #54
AR1 = #0x03
call i2c_WriteData8
;MIC_PGA_L unmute
AC1 = #0x3B
AR1 = #0x5D
call i2c_WriteData8
;MIC_PGA_R unmute
AC1 = #0x3C
AR1 = #0x80
call i2c_WriteData8
;Select page 0
AC1 = #0
AR1 = #0x00
call i2c_WriteData8
;Powerup Left ADC
AC1 = #81
AR1 = #0x80
;AR1 = #0x8A
call i2c_WriteData8
;Unmute Left ADC and mute Right ADC
AC1 = #82
;AR1 = 0x00 -- prec
AR1 = #0x08
call i2c_WriteData8
I put a sinusoid as input signal with a function generator and i see the output with a scope.
My problem is that over 24-25 Khz my signal is attenuated, and existguishes at 40 Khz.
How can i pass the signal up to 50 Khz?
Thanks in Advance
Paolo
