Hello.
I have a couple of questions regarding the ADC section of this codec.
a) We detected (what we think is) a relatively high DC offset on the ADC (digital) output of TLV320AIC3204, in the order of 500 (decimal) one one channel, and 100 on the other channel. ADC is operating at 8ksps, 16 bit, Power Tune Mode = PTM_R4, Decimation Filter A, Processing Block = PRB_R1, AOSR=128, MADC=2, NADC=4, AGC = off, Digital Gain = 0 dB. Datasheet does not specify this DC offset. Is it normal?
b) This offset is important for our application so, if it's normal for this codec, we would like to remove it internally. Is there any low resource filter implementation on TLV320AIC3204 for removing it? Very low audio frequency response is not important for the application. The alternative solution (a calibration process that uses DC measurement is not practical on this application).
Thank you in advance
