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TLV320AIC3206: Analog input bias

na na78
Guru 16770 points
Part Number: TLV320AIC3206

Hi

The analog input to TLV320AIC should be AC-couplied to allow the common mode voltage within the device spec.

According to the datasheet, the analog input range as absolute maximum ratings is AVss to AVdd + 0.3.

So, even if the input is AC-coupled, the input must be over AVss, is it correct?

Now we assume AVss=0V and the input is 2Vpp (+1V, -1V, 0V center) after AC-coupled.

How does the user bias to analog input with the analog input specification (AVss to AVdd + 0.3)?

What is the "CM" in Audio input max ac signal swing on datasheet?

BestRegards

  • 0
    TI__Guru 57800 points

    Hi, Na,

    In general we recommend to avoid driving the device operating conditions close to the absolute maximum ratings as it could lead to a device malfunction, it is strongly recommended to try operating the device under the recommended operating conditions. 

    Regarding your questions, yes, the signal present at the input pin of the codec should be above AVss. The input signal should be AC-coupled to the device terminals to allow decoupling of signal source's common mode voltage with common mode voltage (CM) of the codec. 

    The input voltage required to get a digital full-scale output (0dB) depends on the CM setting of the device. For a 0.9V CM, full-scale input in single-ended mode is 0.5Vrms, and for 0.75V CM, input should be 0.375Vrms. 

    The configuration of the common mode voltage is done via register setting, by default it is 0.9V. 

    Best Regards,

      -Diego Meléndez López
       Audio Applications Engineer

  • 0 in reply to Diego Melendez
    Guru 16770 points

    HI Diego

    Thank you for your reply.

    Could you please check the following?

    According to the datasheet, the device can accept 0.707Vpeak (or 1.41Vpp) audio input signal when VCM = 0.9V.

    So, our customer should suppress input swing because it is 2Vpp currently.

    Then, if we assume Req=10Kohm and Cc=2uF, a cutoff frequency Fc would be 8Hz.

    In addition, if R1=R2=10Kohm, the input signal would be 1Vpp by R1 and R2 divider.

    Do you see any problem on this configuration?

    Could you please tell us your recommendation if you have?

    BestRegards

  • 0 in reply to na na78
    TI__Guru 57800 points

    HI, Na,

    The configuration seems correct for me. Please take into consideration that Req value can change according to the settings of the input routing that is configured with registers 52-57 of page 1 and the PGA gain configured with registers 59-60 of page 1.

    Best Regards,

      -Diego Meléndez López
       Audio Applications Engineer