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TLV320AIC3204: No Audio Output

Part Number: TLV320AIC3204

I am trying to use the TLV320AIC3204 as the I2S master, with MCLK==12MHz. 

I appear to have data coming out of the codec, and I am sending data in, but I am not getting any tone on the head phone or line outputs. 

Enclosed is a waveform of the I2S bus, and here is the register settings. Does anyone know what I am missing?

By the way the datasheet and app notes are bad for this part, no where in either does it mention the difference between register 11 & 12 and 13 & 14 which took me awhile to figure out. 

lv320aic3204.cpp 65: PAGE 0:
tlv320aic3204.cpp 69: 1(0x01)=0(0x00)
tlv320aic3204.cpp 69: 2(0x02)=96(0x60)
tlv320aic3204.cpp 69: 3(0x03)=0(0x00)
tlv320aic3204.cpp 69: 4(0x04)=3(0x03)
tlv320aic3204.cpp 69: 5(0x05)=145(0x91)
tlv320aic3204.cpp 69: 6(0x06)=8(0x08)
tlv320aic3204.cpp 69: 7(0x07)=7(0x07)
tlv320aic3204.cpp 69: 8(0x08)=128(0x80)
tlv320aic3204.cpp 69: 9(0x09)=0(0x00)
tlv320aic3204.cpp 69: 10(0x0A)=0(0x00)
tlv320aic3204.cpp 69: 11(0x0B)=136(0x88)
tlv320aic3204.cpp 69: 12(0x0C)=130(0x82)
tlv320aic3204.cpp 69: 13(0x0D)=3(0x03)
tlv320aic3204.cpp 69: 14(0x0E)=0(0x00)
tlv320aic3204.cpp 69: 15(0x0F)=2(0x02)
tlv320aic3204.cpp 69: 16(0x10)=0(0x00)
tlv320aic3204.cpp 69: 17(0x11)=8(0x08)
tlv320aic3204.cpp 69: 18(0x12)=136(0x88)
tlv320aic3204.cpp 69: 19(0x13)=140(0x8C)
tlv320aic3204.cpp 69: 20(0x14)=128(0x80)
tlv320aic3204.cpp 69: 21(0x15)=1(0x01)
tlv320aic3204.cpp 69: 22(0x16)=0(0x00)
tlv320aic3204.cpp 69: 23(0x17)=4(0x04)
tlv320aic3204.cpp 69: 24(0x18)=0(0x00)
tlv320aic3204.cpp 69: 25(0x19)=0(0x00)
tlv320aic3204.cpp 69: 26(0x1A)=1(0x01)
tlv320aic3204.cpp 69: 27(0x1B)=12(0x0C)
tlv320aic3204.cpp 69: 28(0x1C)=0(0x00)
tlv320aic3204.cpp 69: 29(0x1D)=0(0x00)
tlv320aic3204.cpp 69: 30(0x1E)=176(0xB0)
tlv320aic3204.cpp 69: 31(0x1F)=0(0x00)
tlv320aic3204.cpp 69: 32(0x20)=0(0x00)
tlv320aic3204.cpp 69: 33(0x21)=0(0x00)
tlv320aic3204.cpp 69: 34(0x22)=0(0x00)
tlv320aic3204.cpp 69: 35(0x23)=0(0x00)
tlv320aic3204.cpp 69: 36(0x24)=204(0xCC)
tlv320aic3204.cpp 69: 37(0x25)=238(0xEE)
tlv320aic3204.cpp 69: 38(0x26)=17(0x11)
tlv320aic3204.cpp 69: 39(0x27)=0(0x00)
tlv320aic3204.cpp 69: 40(0x28)=0(0x00)
tlv320aic3204.cpp 69: 41(0x29)=0(0x00)
tlv320aic3204.cpp 69: 42(0x2A)=0(0x00)
tlv320aic3204.cpp 69: 43(0x2B)=0(0x00)
tlv320aic3204.cpp 69: 44(0x2C)=192(0xC0)
tlv320aic3204.cpp 69: 45(0x2D)=0(0x00)
tlv320aic3204.cpp 69: 46(0x2E)=0(0x00)
tlv320aic3204.cpp 69: 47(0x2F)=0(0x00)
tlv320aic3204.cpp 69: 48(0x30)=0(0x00)
tlv320aic3204.cpp 69: 49(0x31)=0(0x00)
tlv320aic3204.cpp 69: 50(0x32)=0(0x00)
tlv320aic3204.cpp 69: 51(0x33)=0(0x00)
tlv320aic3204.cpp 69: 52(0x34)=0(0x00)
tlv320aic3204.cpp 69: 53(0x35)=18(0x12)
tlv320aic3204.cpp 69: 54(0x36)=2(0x02)
tlv320aic3204.cpp 69: 55(0x37)=2(0x02)
tlv320aic3204.cpp 69: 56(0x38)=2(0x02)
tlv320aic3204.cpp 69: 57(0x39)=0(0x00)
tlv320aic3204.cpp 69: 58(0x3A)=0(0x00)
tlv320aic3204.cpp 69: 59(0x3B)=0(0x00)
tlv320aic3204.cpp 69: 60(0x3C)=1(0x01)
tlv320aic3204.cpp 69: 61(0x3D)=7(0x07)
tlv320aic3204.cpp 69: 62(0x3E)=0(0x00)
tlv320aic3204.cpp 69: 63(0x3F)=212(0xD4)
tlv320aic3204.cpp 69: 64(0x40)=2(0x02)
tlv320aic3204.cpp 69: 65(0x41)=0(0x00)
tlv320aic3204.cpp 69: 66(0x42)=0(0x00)
tlv320aic3204.cpp 69: 67(0x43)=0(0x00)
tlv320aic3204.cpp 69: 68(0x44)=111(0x6F)
tlv320aic3204.cpp 69: 69(0x45)=56(0x38)
tlv320aic3204.cpp 69: 70(0x46)=0(0x00)
tlv320aic3204.cpp 69: 71(0x47)=0(0x00)
tlv320aic3204.cpp 69: 72(0x48)=0(0x00)
tlv320aic3204.cpp 69: 73(0x49)=0(0x00)
tlv320aic3204.cpp 69: 74(0x4A)=0(0x00)
tlv320aic3204.cpp 69: 75(0x4B)=238(0xEE)
tlv320aic3204.cpp 69: 76(0x4C)=16(0x10)
tlv320aic3204.cpp 69: 77(0x4D)=216(0xD8)
tlv320aic3204.cpp 69: 78(0x4E)=126(0x7E)
tlv320aic3204.cpp 69: 79(0x4F)=227(0xE3)
tlv320aic3204.cpp 69: 80(0x50)=0(0x00)
tlv320aic3204.cpp 69: 81(0x51)=192(0xC0)
tlv320aic3204.cpp 69: 82(0x52)=0(0x00)
tlv320aic3204.cpp 69: 83(0x53)=0(0x00)
tlv320aic3204.cpp 69: 84(0x54)=0(0x00)
tlv320aic3204.cpp 69: 85(0x55)=0(0x00)
tlv320aic3204.cpp 69: 86(0x56)=0(0x00)
tlv320aic3204.cpp 69: 87(0x57)=0(0x00)
tlv320aic3204.cpp 69: 88(0x58)=127(0x7F)
tlv320aic3204.cpp 69: 89(0x59)=0(0x00)
tlv320aic3204.cpp 69: 90(0x5A)=0(0x00)
tlv320aic3204.cpp 69: 91(0x5B)=0(0x00)
tlv320aic3204.cpp 69: 92(0x5C)=0(0x00)
tlv320aic3204.cpp 69: 93(0x5D)=0(0x00)
tlv320aic3204.cpp 69: 94(0x5E)=0(0x00)
tlv320aic3204.cpp 69: 95(0x5F)=0(0x00)
tlv320aic3204.cpp 69: 96(0x60)=127(0x7F)
tlv320aic3204.cpp 69: 97(0x61)=0(0x00)
tlv320aic3204.cpp 69: 98(0x62)=0(0x00)
tlv320aic3204.cpp 69: 99(0x63)=0(0x00)
tlv320aic3204.cpp 69: 100(0x64)=0(0x00)
tlv320aic3204.cpp 69: 101(0x65)=0(0x00)
tlv320aic3204.cpp 69: 102(0x66)=0(0x00)
tlv320aic3204.cpp 69: 103(0x67)=0(0x00)
tlv320aic3204.cpp 69: 104(0x68)=0(0x00)
tlv320aic3204.cpp 69: 105(0x69)=0(0x00)
tlv320aic3204.cpp 69: 106(0x6A)=0(0x00)
tlv320aic3204.cpp 69: 107(0x6B)=0(0x00)
tlv320aic3204.cpp 69: 108(0x6C)=0(0x00)
tlv320aic3204.cpp 72: PAGE 1:
tlv320aic3204.cpp 22: set page to 1
tlv320aic3204.cpp 76: 1(0x01)=8(0x08)
tlv320aic3204.cpp 76: 2(0x02)=1(0x01)
tlv320aic3204.cpp 76: 3(0x03)=8(0x08)
tlv320aic3204.cpp 76: 4(0x04)=8(0x08)
tlv320aic3204.cpp 76: 5(0x05)=0(0x00)
tlv320aic3204.cpp 76: 6(0x06)=0(0x00)
tlv320aic3204.cpp 76: 7(0x07)=0(0x00)
tlv320aic3204.cpp 76: 8(0x08)=0(0x00)
tlv320aic3204.cpp 76: 9(0x09)=63(0x3F)
tlv320aic3204.cpp 76: 10(0x0A)=64(0x40)
tlv320aic3204.cpp 76: 11(0x0B)=16(0x10)
tlv320aic3204.cpp 76: 12(0x0C)=8(0x08)
tlv320aic3204.cpp 76: 13(0x0D)=8(0x08)
tlv320aic3204.cpp 76: 14(0x0E)=8(0x08)
tlv320aic3204.cpp 76: 15(0x0F)=8(0x08)
tlv320aic3204.cpp 76: 16(0x10)=0(0x00)
tlv320aic3204.cpp 76: 17(0x11)=0(0x00)
tlv320aic3204.cpp 76: 18(0x12)=64(0x40)
tlv320aic3204.cpp 76: 19(0x13)=64(0x40)
tlv320aic3204.cpp 76: 20(0x14)=0(0x00)
tlv320aic3204.cpp 76: 21(0x15)=0(0x00)
tlv320aic3204.cpp 76: 22(0x16)=0(0x00)
tlv320aic3204.cpp 76: 23(0x17)=0(0x00)
tlv320aic3204.cpp 76: 24(0x18)=0(0x00)
tlv320aic3204.cpp 76: 25(0x19)=0(0x00)
tlv320aic3204.cpp 76: 26(0x1A)=0(0x00)
tlv320aic3204.cpp 76: 27(0x1B)=0(0x00)
tlv320aic3204.cpp 76: 28(0x1C)=0(0x00)
tlv320aic3204.cpp 76: 29(0x1D)=0(0x00)
tlv320aic3204.cpp 76: 30(0x1E)=0(0x00)
tlv320aic3204.cpp 76: 31(0x1F)=0(0x00)
tlv320aic3204.cpp 76: 32(0x20)=0(0x00)
tlv320aic3204.cpp 76: 33(0x21)=0(0x00)
tlv320aic3204.cpp 76: 34(0x22)=0(0x00)
tlv320aic3204.cpp 76: 35(0x23)=0(0x00)
tlv320aic3204.cpp 76: 36(0x24)=0(0x00)
tlv320aic3204.cpp 76: 37(0x25)=0(0x00)
tlv320aic3204.cpp 76: 38(0x26)=0(0x00)
tlv320aic3204.cpp 76: 39(0x27)=0(0x00)
tlv320aic3204.cpp 76: 40(0x28)=0(0x00)
tlv320aic3204.cpp 76: 41(0x29)=0(0x00)
tlv320aic3204.cpp 76: 42(0x2A)=0(0x00)
tlv320aic3204.cpp 76: 43(0x2B)=0(0x00)
tlv320aic3204.cpp 76: 44(0x2C)=0(0x00)
tlv320aic3204.cpp 76: 45(0x2D)=0(0x00)
tlv320aic3204.cpp 76: 46(0x2E)=0(0x00)
tlv320aic3204.cpp 76: 47(0x2F)=0(0x00)
tlv320aic3204.cpp 76: 48(0x30)=0(0x00)
tlv320aic3204.cpp 76: 49(0x31)=0(0x00)
tlv320aic3204.cpp 76: 50(0x32)=0(0x00)
tlv320aic3204.cpp 76: 51(0x33)=0(0x00)
tlv320aic3204.cpp 76: 52(0x34)=128(0x80)
tlv320aic3204.cpp 76: 53(0x35)=0(0x00)
tlv320aic3204.cpp 76: 54(0x36)=128(0x80)
tlv320aic3204.cpp 76: 55(0x37)=128(0x80)
tlv320aic3204.cpp 76: 56(0x38)=0(0x00)
tlv320aic3204.cpp 76: 57(0x39)=128(0x80)
tlv320aic3204.cpp 76: 58(0x3A)=0(0x00)
tlv320aic3204.cpp 76: 59(0x3B)=12(0x0C)
tlv320aic3204.cpp 76: 60(0x3C)=12(0x0C)
tlv320aic3204.cpp 76: 61(0x3D)=255(0xFF)
tlv320aic3204.cpp 76: 62(0x3E)=3(0x03)
tlv320aic3204.cpp 76: 63(0x3F)=192(0xC0)
tlv320aic3204.cpp 76: 64(0x40)=0(0x00)
tlv320aic3204.cpp 76: 65(0x41)=0(0x00)
tlv320aic3204.cpp 76: 66(0x42)=0(0x00)
tlv320aic3204.cpp 76: 67(0x43)=0(0x00)
tlv320aic3204.cpp 76: 68(0x44)=0(0x00)
tlv320aic3204.cpp 76: 69(0x45)=0(0x00)
tlv320aic3204.cpp 76: 70(0x46)=0(0x00)
tlv320aic3204.cpp 76: 71(0x47)=50(0x32)
tlv320aic3204.cpp 76: 72(0x48)=0(0x00)
tlv320aic3204.cpp 76: 73(0x49)=0(0x00)
tlv320aic3204.cpp 76: 74(0x4A)=0(0x00)
tlv320aic3204.cpp 76: 75(0x4B)=0(0x00)
tlv320aic3204.cpp 76: 76(0x4C)=0(0x00)
tlv320aic3204.cpp 76: 77(0x4D)=0(0x00)
tlv320aic3204.cpp 76: 78(0x4E)=0(0x00)
tlv320aic3204.cpp 76: 79(0x4F)=0(0x00)
tlv320aic3204.cpp 76: 80(0x50)=0(0x00)
tlv320aic3204.cpp 76: 81(0x51)=0(0x00)
tlv320aic3204.cpp 76: 82(0x52)=0(0x00)
tlv320aic3204.cpp 76: 83(0x53)=0(0x00)
tlv320aic3204.cpp 76: 84(0x54)=0(0x00)
tlv320aic3204.cpp 76: 85(0x55)=0(0x00)
tlv320aic3204.cpp 76: 86(0x56)=0(0x00)
tlv320aic3204.cpp 76: 87(0x57)=0(0x00)
tlv320aic3204.cpp 76: 88(0x58)=0(0x00)
tlv320aic3204.cpp 76: 89(0x59)=0(0x00)
tlv320aic3204.cpp 76: 90(0x5A)=0(0x00)
tlv320aic3204.cpp 76: 91(0x5B)=0(0x00)
tlv320aic3204.cpp 76: 92(0x5C)=0(0x00)
tlv320aic3204.cpp 76: 93(0x5D)=0(0x00)
tlv320aic3204.cpp 76: 94(0x5E)=0(0x00)
tlv320aic3204.cpp 76: 95(0x5F)=0(0x00)
tlv320aic3204.cpp 76: 96(0x60)=0(0x00)
tlv320aic3204.cpp 76: 97(0x61)=0(0x00)
tlv320aic3204.cpp 76: 98(0x62)=0(0x00)
tlv320aic3204.cpp 76: 99(0x63)=0(0x00)
tlv320aic3204.cpp 76: 100(0x64)=0(0x00)
tlv320aic3204.cpp 76: 101(0x65)=0(0x00)
tlv320aic3204.cpp 76: 102(0x66)=0(0x00)
tlv320aic3204.cpp 76: 103(0x67)=0(0x00)
tlv320aic3204.cpp 76: 104(0x68)=0(0x00)
tlv320aic3204.cpp 76: 105(0x69)=0(0x00)
tlv320aic3204.cpp 76: 106(0x6A)=0(0x00)
tlv320aic3204.cpp 76: 107(0x6B)=0(0x00)
tlv320aic3204.cpp 76: 108(0x6C)=0(0x00)
tlv320aic3204.cpp 76: 109(0x6D)=0(0x00)
tlv320aic3204.cpp 76: 110(0x6E)=0(0x00)
tlv320aic3204.cpp 76: 111(0x6F)=0(0x00)
tlv320aic3204.cpp 76: 112(0x70)=0(0x00)
tlv320aic3204.cpp 76: 113(0x71)=0(0x00)
tlv320aic3204.cpp 76: 114(0x72)=0(0x00)
tlv320aic3204.cpp 76: 115(0x73)=0(0x00)
tlv320aic3204.cpp 76: 116(0x74)=0(0x00)
tlv320aic3204.cpp 76: 117(0x75)=0(0x00)
tlv320aic3204.cpp 76: 118(0x76)=0(0x00)
tlv320aic3204.cpp 76: 119(0x77)=0(0x00)
tlv320aic3204.cpp 76: 120(0x78)=0(0x00)
tlv320aic3204.cpp 76: 121(0x79)=0(0x00)
tlv320aic3204.cpp 76: 122(0x7A)=0(0x00)

  • Hi, Trampas,

    Overall, the playback configuration of the device is correct according to the settings you shared. Could you please check what are you getting at the output of the device?, you should expect a common mode voltage. Also, have you tried using a loopback to route directly the ADC output to the DAC input to discard any issue with your I²S input data?, this is done by writing a '1' to bit D4 of register 29, Page 0. Another thing to try would be to configure the NDAC, MDAC and DOSR dividers with the same values as the ADC dividers (AOSR, NADC and MADC).

    Best Regards,

      -Diego Meléndez López
       Audio Applications Engineer