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Starterware/TLV320AIC3106: Audio codec configuration for G.711 audio data format

Vishnu Pradeep
Intellectual 505 points
Part Number: TLV320AIC3106
Other Parts Discussed in Thread: CC3200, , TPA2012D2

Tool/software: Starterware

Hi all,

I am new to audio applications. I am doing a VoIP application using TLV320AIC3106 I2S interfaced to CC3200, with asterisk as my VoIP server. I am trying to send audio data in RTP stream as G.711 codec. I selected TLV320AIC3106 audio codec. This is the features of G.711.

  • Sampling frequency 8 kHz
  • 64 kbit/s bitrate (8 kHz sampling frequency × 8 bits per sample)

I have attached the schematic of my application. Please verify whether it is correct. I am using a condenser mic with mono configuration. Is it possible to encode condenser mic out with the attached circuit to a format which can be used to encode it as G.711 using 3rd party software codec? 

If I am using a 12.288MHz crystal to MCLK, Fsref would be 48KHz (no PLL) and ADC Fs can be set to 8KHz. Is it possible to read audio data of 16 bits, 8KHz sampling rate using I2S? 

Tlv320_sch.pdf

Thanks & regards,

Vishnu Pradeep

  • 0
    TI__Guru 57800 points

    Hi, Vishnu,

    The TLV320AIC3106 device is able to use only PCM formats like I²S, Left-Justified, Right-Justified and TDM. I am not familiar with G.711 format, but probably you'll need a different device to convert from the supported formats of the 'AIC3106 to G.711. 

    In Master mode, the AIC3106 should be able to generate the I²S clocks from a 12.288MHz Master clock without the PLL. 16-bit, 8KHz sampling rate is supported by this device. 

    I reviewed your schematics and have some comments. Please refer to below points.

    • Assuming that C2 and C3 are related to AVDD pin and C6 and C7 to IOVDD pin, decoupling capacitors are missing for DVDD (pin 36) and DRVDD (pin 24 and 17,16).
    • The mic differential inputs are reversed, the leg connected to Micbias should be the positive input (LINE2P) and the one connected to GND should be the negative input (LINE2M).
    • Output low-pass filter for the amplifier is incorrect, it has a cutoff frequency of 15Hz, please update the values with 560Ω and 4700pF as suggested in the datasheet.
    • A DC-blocking cap is missing before the TPA2012D2, please add a 1µF cap there. 
    • Decoupling caps are missing in the TPA2012D2 as well. 
    • Pin 4 of TPA2012D2 should be tied to GND (PGND).
    • Caps in the output filter of the TPA2012 are not necessary if a ferrite bead is not used.

    Best Regards,

      -Diego Meléndez López
       Audio Applications Engineer

  • 0 in reply to Diego Melendez
    Intellectual 505 points
    Hi Diego,

    Thanks a lot for the reply. I have just noticed that mic inputs are reversed. Decoupling capacitors for DVDD and DRVDD are connected and is not in this schematic. I will change all other capacitor values accordingly.

    I am using AIC3106 in slave mode. so CC3200 is the master who generates I2S clock for sampling 8KHz , 16 bit mono audio, which is 128KHz bitclock. If I use 12.288MHz crystal as in the schematic, ADC Fs can be set to 8KHz by configuring Page0/register 2 from 48KHz Fsref (12.288MHz/(128*2). Then by providing 128KHz I2S bitclock from CC3200, is it possible to read 16 bit, 8KHz linear PCM data. If it is possible, I can encode it inot G.711 using software codec.

    Thanks & regards,
    Vishnu Pradeep
  • 0 in reply to Vishnu Pradeep
    TI__Guru 57800 points

    Hi, Vishnu,

    Thanks for the feedback. Regarding the clock rates you are mentioning, I am afraid that are not valid for a couple of reasons, please refer o below

    • The TLV320AIC3106 supports only stereo digital data, so mono audio is not supported.
    • Bit clock (BCLK) to word clock (WCLK) rate of 16 is not supported, BCLK should be either 32 or 64 times WCLK. 
    • MCLK should be part of the same clock tree of the I²S signals, using a separate MCLK for the codec is not recommended. Please refer to SLAA469  App note as reference.

    Sampling rate of 8KHz is supported, but in this case, BCLK should have a frequency of 256KHz (2×16-bit channels). The device should be configured with 16-bit data size. If for your application, mono data is required,  your processor should be able to ignore the second channel data. 

    Best Regards,

      -Diego Meléndez López
       Audio Applications Engineer

  • 0 in reply to Diego Melendez
    Intellectual 505 points

    Hi Diego,

    Thanks for the points.
    As you suggested, I will ignore the second channel data to get mono audio. but 8KHz sample rate is important to my application.
    Why MCLK should be a part of same clock tree of I2S? 
    For 8KHz sampling rate, what is the recommended clock input? Can you suggest me how can I give the clock?
    I think 256KHz cannot be given as MCLK input because the datasheet says 512KHz to 50MHz. So which clock spurce can I use for audio clock (Fsref) generation?

    If none of the above is possible, Is there any configuration I can make such that the output of AIC3106 can be resampled in software to get 8KHz,8bit data? If yes, how? what are the clock requirements?

    Thanks & regards,
    Vishnu Pradeep

  • 0 in reply to Vishnu Pradeep
    TI__Guru 57800 points

    Hi, Vishnu,

    MCLK should be provided from the same clock tree to ensure there is proper synchronization between the clocks, avoiding possible noise issues or uncommon performance of the device. If no MCLK is provided in your system, you can use BCLK to generate the internal clocks with the on-chip PLL. this is mentioned in the app note I mentioned before.  

    Best Regards,

      -Diego Meléndez López
       Audio Applications Engineer

  • 0 in reply to Diego Melendez
    Intellectual 505 points
    Hi Diego,

    Thanks for the response. In my case if I use 256KHz BCLK, according to TLV320AIC3106 datasheet, the clock input should be in the range of 512KHz to 50MHz for MCLK pin for clock generation. Is this applicable for on-chip PLL as well. Because as per the PLL calculation I've seen in datasheet I couldn't figure out a proper PLL setting with 256KHz BCLK for my application.

    Atleast can you suggest me a different hardware codec which has an I2S interface from which I can get any of the below format or a format which can be converted to the below format easily.

    www.voip-info.org/wiki-asterisk codecs

    Please help.


    Thanks & regards,
    Vishnu Pradeep