TAS5782M: Powering sequence and MCLK

Hello Kevin! Andy can support your question further as needed, but... what is your configuration? Are you working with your own design or are you just working with the EVM as set up in the EVM Guide? www.ti.com/.../slau708.pdf Thanks, Jeff

Hi Jeff,

Thanks a lot, it's my customer's project, waiting for reply,

Now initialized before I2S clock exists and use BCLK as MCLK,

Kevin Dang

Hi Kevin,

Actually I'm updating the app note TAS5782M process flow. One of the changes is to add power-up and power-down sequence.

Below is what you will see in the updated app note.

Appendix B. Power-Up and Power-Down Sequence.pdf

Andy

Hi Kelvin,

MCLK cannot be 19.2MHz. I would suggest your customer use a 3-wire I2S.

Andy

Andy,
The datasheet shows that MCLK only support >=128Fs, so even for 64Fs BCLK used for MCLK, we have to use PLL?
And whether the Auto clock settings use PLL automatically?
Regards,
Kevin.

Hi Kevin,

I just did a quick test.

TAS5782M can auto detect the input clocks when MCLK = BCLK = 3.072MHz and LRCLK = 48kHz.

Andy

Andy,
Yes we are using it, and initialize before I2S clock exists, every thing works fine, but not sure whether it's allowed, thanks a lot,
Kevin Dang