tlv320aic3100: tlv320aic3100 headset detection

Hi, Akinet,

I have asked my colleague to take a look to your questions. Can you please read the value of bits D6-D5 of register 67? Is the headset identified?. The headset detection feature should work after the analog general configuration is done. Can you please provide your register setup?.

Best Regards,

  -Diego Meléndez López
   Audio Applications Engineer

Hello Diego,

Thank you for the quick reply.

Yes I'm reading the D6-D5 bits for register 0-67, there also the headset is not getting identified. D6-D5 bits are set to 0.

And my custom board is having linux kernel using this driver: sound/soc/codecs/tlv320aic31xx.c, in this driveri have created "proc" read/write methods to read/write the codec registers.

Here is the register map:

static const struct snd_soc_dapm_route
aic31xx_audio_map[] = {
/* DAC Input Routing */
{"DAC Left Input", "Left Data", "DAC IN"},
{"DAC Left Input", "Right Data", "DAC IN"},
{"DAC Left Input", "Mono", "DAC IN"},
{"DAC Right Input", "Left Data", "DAC IN"},
{"DAC Right Input", "Right Data", "DAC IN"},
{"DAC Right Input", "Mono", "DAC IN"},
{"DAC Left", NULL, "DAC Left Input"},
{"DAC Right", NULL, "DAC Right Input"},

/* Mic input */
{"MIC1LP P-Terminal", "FFR 10 Ohm", "MIC1LP"},
{"MIC1LP P-Terminal", "FFR 20 Ohm", "MIC1LP"},
{"MIC1LP P-Terminal", "FFR 40 Ohm", "MIC1LP"},
{"MIC1RP P-Terminal", "FFR 10 Ohm", "MIC1RP"},
{"MIC1RP P-Terminal", "FFR 20 Ohm", "MIC1RP"},
{"MIC1RP P-Terminal", "FFR 40 Ohm", "MIC1RP"},
{"MIC1LM P-Terminal", "FFR 10 Ohm", "MIC1LM"},
{"MIC1LM P-Terminal", "FFR 20 Ohm", "MIC1LM"},
{"MIC1LM P-Terminal", "FFR 40 Ohm", "MIC1LM"},

{"MIC1LM M-Terminal", "FFR 10 Ohm", "MIC1LM"},
{"MIC1LM M-Terminal", "FFR 20 Ohm", "MIC1LM"},
{"MIC1LM M-Terminal", "FFR 40 Ohm", "MIC1LM"},

{"MIC_GAIN_CTL", NULL, "MIC1LP P-Terminal"},
{"MIC_GAIN_CTL", NULL, "MIC1RP P-Terminal"},
{"MIC_GAIN_CTL", NULL, "MIC1LM P-Terminal"},
{"MIC_GAIN_CTL", NULL, "MIC1LM M-Terminal"},
{"ADC", NULL, "MIC_GAIN_CTL"},

/* Left Output */
{"Output Left", "From Left DAC", "DAC Left"},
{"Output Left", "From MIC1LP", "MIC1LP"},
{"Output Left", "From MIC1RP", "MIC1RP"},

/* Right Output */
{"Output Right", "From Right DAC", "DAC Right"},
{"Output Right", "From MIC1RP", "MIC1RP"},

/* HPL path */
{"HP Left", "Switch", "Output Left"},
{"HPL Driver", NULL, "HP Left"},
{"HPL", NULL, "HPL Driver"},

/* HPR path */
{"HP Right", "Switch", "Output Right"},
{"HPR Driver", NULL, "HP Right"},
{"HPR", NULL, "HPR Driver"},
};

thanks,

aniket

Hello Diego Meléndez López,

I am also working with Aniket on the same issue. We request your quick support since we are about to start the Production Run.
Following are more information.

(1) Voltage Measured at Pin 11 (VOL/MICDET) is = 0.99V [When headset connector is not inserted]
(2) Voltage Measured at Pin 11 (VOL/MICDET) is = 0.0V [When headset connector is inserted]

Our AVDD = 2.85V.

As per the datasheet, VOL/MICDET pin's maximum limit is AVDD/2 which is equal to 1.425V.

And when we are disabling the D7 bit (HeadSet Detection Enable) in the page 0 register 67, we are able to see the voltage disappearing.

Our question is:

(a) Is there a threshold minimum for the removal detection for pin 11 (VOL/MICDET)?
(b) If yes, what is the value?

Thanks and regards,
Paul

Hello Paul,
Sorry for the delayed response.
As far as the thresholds for the MICDET goes, please refer to the app note which breaks down the min thresholds for the MICDET implementation.
www.ti.com/.../slaa454.pdf

The configuration (P0R48 = 0x80) will only produce a single pulse once when a headset event is detected. You will have to read the flag registers (P0R44 through P0R47) to reset / re-enable the detection interrupt. Alternatively you can set P0R48D0 = 1 to have the AIC3100 generates pulses on the GPIO1/INT pin (it will do so until the flag registers are read).

Can you please let me know if you were not seeing the flag register (P044 thro P047) not indicating headset insertion w. your configuration?

Best regards,
Ravi

Hello Ravi,

Sorry for the delayed reply. We have done a work around for this.

Thanks and regards,
Paul