Hi,
i need to know if the sampling frequency and playback frequency of my configuration reported below is correct for 192 KHz
_AIC3204_rx:
; Point to page 0
AC1 = #0
AR1 = #0x0
call i2c_WriteData8
;reset codec
AC1 = #1
AR1 = #0x1
call i2c_WriteData8
; Point to page 1
AC1 = #0
AR1 = #0x1
call i2c_WriteData8
;Disable crude AVDD generation from DVDD
AC1 = #1
AR1 = #0x08
call i2c_WriteData8
;Enable Analog Blocks and LDO
AC1 = #2
AR1 = #0x01
call i2c_WriteData8
;***********************************************************************
;* PLL and Clocks config and Power Up
;***********************************************************************
; Point to page 0
AC1 = #0
AR1 = #0x0
call i2c_WriteData8
;BCLK and WCLK is set as op to AIC3204(Master) - 16 bits word
AC1 = #27
AR1 = #0x0D
call i2c_WriteData8
;PLL setting: PLLCLK <- MCLK and CODEC_CLKIN <-PLL CLK
AC1 = #4
AR1 = #0x03
call i2c_WriteData8
;PLL Power up; PLL Divider params: P = 1, R = 1
AC1 = #5
AR1 = #0x91
call i2c_WriteData8
;PLL setting: J=8
AC1 = #6
AR1 = #0x08
call i2c_WriteData8
;PLL setting: HI_BYTE(D) for D=0
AC1 = #7
AR1 = #0x07
call i2c_WriteData8
;PLL setting: LO_BYTE(D) for D=0
AC1 = #8
AR1 = #0x80
call i2c_WriteData8
;NDAC = 2
AC1 = #11
AR1 = #0x82
call i2c_WriteData8
;MDAC = 8
AC1 = #12
AR1 = #0x88
call i2c_WriteData8
;DOSR H (DOSR = 32)
AC1 = #13
AR1 = #0x00
call i2c_WriteData8
;DOSR L (DOSR = 32)
AC1 = #14
AR1 = #0x20
call i2c_WriteData8
;Clock Setting Register 11, BCLK N Divider N = 7
AC1 = #30
AR1 = #0x87
call i2c_WriteData8
;Power up NADC and set NADC value to 2
AC1 = #18
AR1 = #0x82
call i2c_WriteData8
;Power up MADC and set MADC value to 8
AC1 = #19
AR1 = #0x88
call i2c_WriteData8
;AOSR for AOSR = 32
AC1 = #20
AR1 = #0x20
call i2c_WriteData8
; Point to page 0
AC1 = #0
AR1 = #0x0
call i2c_WriteData8
; DAC PRB
AC1 = #60
AR1 = #16
call i2c_WriteData8
; ADC PRB
AC1 = #61
AR1 = #7
call i2c_WriteData8
;***********************************************************************
;* DAC ROUTING and Power Up
;***********************************************************************
;Select page 1
AC1 = #0
AR1 = #0x01
call i2c_WriteData8
;Left Channel DAC reconstruction filter's positive terminal is routed to HPL
AC1 = #12
AR1 = #0x08
call i2c_WriteData8
;Select page 0
AC1 = #0
AR1 = #0x00
call i2c_WriteData8
;Left and Right Channel have independent volume control
AC1 = #64
AR1 = #0x04
call i2c_WriteData8
;Left DAC Channel Digital Volume +24dB
AC1 = #65
AR1 = #0x30
call i2c_WriteData8
;Power up left,right data paths and set channel
AC1 = #63
AR1 = #0x90
;AR1 = #0xB2
call i2c_WriteData8
;Select page 1
AC1 = #0
AR1 = #0x01
call i2c_WriteData8
;Unmute HPL , 0dB gain
AC1 = #16
AR1 = #0x00
call i2c_WriteData8
;Mute HPR
AC1 = #17
AR1 = #0x40
call i2c_WriteData8
;Power up HPL
AC1 = #9
AR1 = #0x20
call i2c_WriteData8
@BRC0_L = #0x02FF || mmap()
localrepeat {
repeat(#0xFFFF)
NOP_16
NOP_16
}
;***********************************************************************
;* ADC ROUTING and Power Up
;***********************************************************************
;Select page 1
AC1 = #0
AR1 = #0x01
call i2c_WriteData8
AC1 = #52
AR1 = #0x30
call i2c_WriteData8
;CM_1 (common mode) to LADC_M through 40 kohm
AC1 = #54
AR1 = #0x03
call i2c_WriteData8
;Left MICPGA Volume Control 24dB
AC1 = #59
AR1 = #0x60
call i2c_WriteData8
;MIC_PGA_R unmute
AC1 = #60
AR1 = #0x80
call i2c_WriteData8
;Select page 0
AC1 = #0
AR1 = #0x00
call i2c_WriteData8
;Unmute Left ADC and mute Right ADC
AC1 = #82
AR1 = #0x08
call i2c_WriteData8
;Powerup Left ADC
AC1 = #81
AR1 = #0x80
;AR1 = #0x8A
call i2c_WriteData8
;Dummy read
AC1 = 9
AR1 = 0xABAB
call i2c_ReadData8
return
I have calculated PLL parameters assuming MCLK drew = 12Mhz.
Thanks in advance
Paolo
