This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TAS5760M: Question of TAS5760 Power and Clock Sequences

Part Number: TAS5760M

Hi Sirs,

Would you pls advise

(1) the PVDD, AVDD and DVDD's power up sequence of the TAS5760M. Should we turn on power rails from high voltage to low voltage and turn off power rails from low voltage to high voltage? Can we keep PVCC and AVDD always on and turn on/off the DVDD in suspend mode?

(2) Should we turn on MCLK before I2C command in software mode and assert SPK_SD# signal to high in hardware mode?

Thank you and Best regards,

Wayne Chen
09/14/2017

  • Hello Wayne! This can depend on what you are trying to do... are you just working on the EVM, or is the actual design. If design, are you using the reference application design under SW or HW control... I assume SW control? If so you just need to follow the procedue in the DS:

    10.2.1.2.1 Startup Procedures- Software Control Mode
    1. Configure all digital I/O pins as required by the application using PCB connections (that is SPK_GAIN[1:0] = 11, ADR, etc.)
    2. Start with SPK_SD Pin = LOW
    3. Bring up power supplies (it does not matter if PVDD/AVDD or DVDD comes up first, provided the device is held in shutdown.)
    4. Once power supplies are stable, start MCLK, SCLK, LRCK
    5. Configure the device via the control port in the manner required by the use case, making sure to mute the device via the control port
    6. Once power supplies and clocks are stable and the control port has been programmed, bring SPK_SD HIGH
    7. Unmute the device via the control port
    8. The device is now in normal operation

    If hardware Mode, it also does not matter if PVDD/AVDD or DVDD comes up first, provided the device is held in shutdown.

    Andy can help you with any further questions. Thanks, Jeff
  • Hi Jeff, Thanks a lot. In shutdown mode, can we turn off DVDD but keep PVDD/AVDD on? Any leakage issue?...Wayne Chen
  • Hi Wayne,

    The only issue we can see is a small leakage current on the FAULT pin.

    Andy
  • Hi Wayne,

    I have double checked with our design team. Even that leakage current on the FAULT pin doesn't exist.

    Andy