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TLV320AIC3106: How do TDM slots change sample time?

Curtis Albrecht
Prodigy 140 points
Part Number: TLV320AIC3106

If I have 2 codecs on an I2S bus so one codec transmits L and R in slots 0 and 1, while the second codec transmits in 2 and 3, are their sample times still synchronous to the WCLK pulse? Is there a 0.5 / Fs time shift between their ADC sample times?

Will the data that shows up on the bus in the above scenario be identical to data in the following:

2 codecs on an I2S bus using Left justified data format. I realize that the data will be in different time slots, but with the ADC sample time be identical.

Left and right channels within a codec are sampled at the same time, regardless, correct? TDM 4 vs. TDM 8 doesn't impact the relative delay between L and R channels?

Thanks!

Curt

  • 0
    TI__Guru 57800 points

    Hi, Curtis,

    The sampling of the device is performed based on WCLK, so the data transmitted on each slot during the same WCLK period is sampled at the same time. Correct, left or right data from different devices might be in different slots, but sampled at the same time.

    Best Regards,

      -Diego Meléndez López
       Audio Applications Engineer