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SRC4392: SRC4392 - Initialization for AES3 Output

Part Number: SRC4392

Hi All!

I am using TIs SRC4392 for an Audioapplication!
At the moment I try to understand which Register I have to set to get an Outputsignal on AESOUT!

On SDINA I have an I2S Input Audiosignal and now i want to get it on the AESOUT Pin to use it.

To my mind all necessary Registers are set per Default but it doesn't work in my application!

I hope someone can help me!

Best regards

Martin

  • Hi, Martin,

    Sorry to hear you are having issues with this device. My colleague in charge of this device has been notified about your question and will get back to you as soon as possible.

    Best Regards,

      -Diego Meléndez López
       Audio Applications Engineer

  • Hi Martin,

    Sorry for the delay as I was out-of-office...

    Regarding the AESOUT signal, can you please let me know what path you want to configure the device in for your application? NOTE that on power-up, the default value of register 0x01 is 0x00 which implies that all the blocks (DIR/DIT/SRC) are powered down. 

    You will need to set the bit to '1' to for relevant block to operate normally based upon the applicable control register settings. NOTE that there is bypass option for input to bypass the DIR/DIT blocks but that would also require some register configuration.

    If you give you more details of the use case, I can definitely help you w. relevant register configuration. Thanks again.

    Best regards,
    Ravi