This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TLV320AIC3104: BCLK and WCLK Output Interrupted for about 15ms in Master Mode when Processor Start Sending Data to DIN Pin

Part Number: TLV320AIC3104

Hi, Team

My automotive customer is using TLV320AIC3104 in their car infotainment system. They use TLV320AIC3104 ADC to convert MIC signal to processor and use TLV320AIC3104 DAC to convert audio data form processor to amplifier.

The MCLK is 16MHz from processor i.MX6. WCLK is 44.1kHz. PLL settings are: P = 1, R = 1, J = 5, D = 6448. TLV320AIC3104 is in master mode and output WCLK and BCLK.

When i.MX6 start sending data to DIN pin, BCLK and WCLK output from TLV320AIC3104 will interrupted for about 15ms and cause pop noise.

I change the MCLK source to a oscillator, but the issue is still there. Here is the waveform of WCLK interruption.

Is there any suggestion to solve this issue?

Thanks

Kevin Zhang

  • Hi, Kevin,

    Could you please share the register configuration used for this device?, also, can you please provide details about the power supply sequencing used?.

    Thanks and Best Regards,

      -Diego Meléndez López
       Audio Applications Engineer

  • Hi, Diego

    Here is the register configuratiion. I will send you the shcematic by Email.

    Register Address Register Value
    0x00 0x00
    0x01 0x80
    0x00 0x00
    0x07 0x8A
    0x25 0xC0
    0x29 0x02
    0x2B 0x00
    0x2C  0x00
    0x52 0x80
    0x5C 0x80
    0x56 0x09
    0x5D 0x09
    0x11 0x0F
    0x12 0xF0
    0x13 0x7C
    0x16 0x7C
    0x0F 0x00
    0x10 0x00
    0x19 0x80
    0x03 0x01
    0x04 0x14
    0x05 0x64
    0x06 0xC0
    0x0B 0x01
    0x03 0x81
    0x08 0xC0

    Thanks

    Kevin Zhang