I have a TLV320AIC3204 on my board (schematics reviewed by TI). We just got our main SOC to output a 19.2MHz mclk to it, however the rest of the I2S interface is not working yet. Can I use the beep generator to put out a tone? I tried but the beep generator configuration register never changed from enabled 0x80 to done 0x00 and I got nothing on the headphone outputs. I tried to modify the example scripts in the user guide.
This is my playback setup file
#Assumption #AVdd = 1.8V, DVdd = 1.8V #MCLK = 12.288MHz wrong mclk for us is 19.2MHz #Ext C = 47uF #Based on C the wait time will change. #Wait time = N*Rpop*C + 4* Offset ramp time #Default settings used. #PLL Disabled #DOSR 128 # Initialize to Page 0 #w 30 00 00 i2cset_normal_syk -f -y 12 0x18 0x00 0x00 # Initialize the device through software reset #w 30 01 01 i2cset_normal_syk -f -y 12 0x18 0x01 0x01 # Power up the NDAC divider with value 2 #w 30 0b 81 i2cset_normal_syk -f -y 12 0x18 0x0B 0x82 # Power up the MDAC divider with value 7 #w 30 0c 82 i2cset_normal_syk -f -y 12 0x18 0x0C 0x87 # Program the OSR of DAC to 128 #w 30 0d 00 #w 30 0e 80 i2cset_normal_syk -f -y 12 0x18 0x0D 0x00 i2cset_normal_syk -f -y 12 0x18 0x0E 0x80 # Set the word length of Audio Interface to 16bits #w 30 1b 10 i2cset_normal_syk -f -y 12 0x18 0x1b 0x00 # Set the DAC Mode to PRB_P25 only one with beep generator #w 30 3c 08 -changed i2cset_normal_syk -f -y 12 0x18 0x3C 0x19 # Select Page 1 #w 30 00 01 i2cset_normal_syk -f -y 12 0x18 0x00 0x01 # Disable Internal Crude AVdd in presence of external AVdd supply or before #powering up internal AVdd LDO #w 30 01 08 i2cset_normal_syk -f -y 12 0x18 0x01 0x08 # Enable Master Analog Power Control #w 30 02 00 i2cset_normal_syk -f -y 12 0x18 0x02 0x00 # Set the REF charging time to 40ms #w 30 7b 01 i2cset_normal_syk -f -y 12 0x18 0x7B 0x01 # HP soft stepping settings for optimal pop performance at power up # Rpop used is 6k with N = 6 and soft step = 20usec. This should work with 47uF coupling # capacitor. Can try N=5,6 or 7 time constants as well. Trade-off delay vs “pop” sound. #w 30 14 25 i2cset_normal_syk -f -y 12 0x18 0x14 0x25 # Set the Input Common Mode to 0.9V and Output Common Mode for Headphone to # Input Common Mode #w 30 0a 00 i2cset_normal_syk -f -y 12 0x18 0x0A 0x00 # Route Left DAC to HPL #w 30 0c 08 i2cset_normal_syk -f -y 12 0x18 0x0C 0x08 # Route Right DAC to HPR #w 30 0d 08 i2cset_normal_syk -f -y 12 0x18 0x0D 0x08 # Set the DAC PTM mode to PTM_P3/4 #w 30 03 00 #w 30 04 00 i2cset_normal_syk -f -y 12 0x18 0x03 0x00 i2cset_normal_syk -f -y 12 0x18 0x04 0x00 # Set the HPL gain to 0dB #w 30 10 00 i2cset_normal_syk -f -y 12 0x18 0x10 0x00 # Set the HPR gain to 0dB #w 30 11 00 i2cset_normal_syk -f -y 12 0x18 0x11 0x00 # Power up HPL and HPR drivers #w 30 09 30 i2cset_normal_syk -f -y 12 0x18 0x09 0x30 # Wait for 2.5 sec for soft stepping to take effect # Else read Page 1, Register 63d, D(7:6). When = “11” soft-stepping is complete # Select Page 0 #w 30 00 00 i2cset_normal_syk -f -y 12 0x18 0x00 0x00 # Power up the Left and Right DAC Channels with route the Left Audio digital data to # Left Channel DAC and Right Audio digital data to Right Channel DAC #w 30 3f d6 i2cset_normal_syk -f -y 12 0x18 0x3F 0xD6 # Unmute the DAC digital volume control #w 30 40 00 i2cset_normal_syk -f -y 12 0x18 0x40 0x00
and this is my "play a beep script"
#longest beep sample allowed i2cset_normal_syk -f -y 12 0x18 0x49 0xFF i2cset_normal_syk -f -y 12 0x18 0x4A 0xFF i2cset_normal_syk -f -y 12 0x18 0x4B 0xFF #BEEP! i2cset_normal_syk -f -y 12 0x18 0x47 0x80
Does this look like it should work? I'm assuming either I missed a configuration step or I won't get a beep because the I2S interface is not streaming in from the external processor yet.
Thank you
