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TPA3111D1: TPA3111D1 Power Sequence Question

Kuo Duke
Expert 2040 points
Part Number: TPA3111D1
Other Parts Discussed in Thread: TPA3110D2

Hi Team,

Could you help provide TPA3111D1 power up sequence? and provide how to reserve components for pop noise?

  • 0
    TI__Mastermind 24835 points
    Hi Duke,
    The pop noise is actually caused by the imbalance between P and N input during DC biase set-up. So please use differential input mode as much as possibe to minimize the pop noise. Lower input capacitors can also help to decrease the pop noise(I think 0.047uF should be low enough). If single-ended input mode has to be used, please use pseudo-differential input routing in PCB layout design. Please also make sure there is no other components between DAC/Codec output and AUDIO_IN+ to make sure the matching between INP and INN input is good.
    Best regards,
    Shawn Zheng
  • 0 in reply to Shawn Zheng
    Expert 2040 points
    Dear Sir,

    Thanks for your clear explain. below is other question from my customer.
    PVCC and AVCC has timing chart ? Do you have idea why customer need this timing?

    Thanks!
    Duke
  • 0 in reply to Kuo Duke
    TI__Mastermind 24835 points
    Hi Duke,
    Theoretically pop noise can't be avoided by ramp AVCC first and then PVCC. The input common DC voltage can be built before PVCC is applied. But usually AVCC power supply is connected with PVCC power supply in TPA3110D2 application, so we don't have the data for this timing sequence. But when you toggle SDZ pin to mute/umute the output, pop noise is still there. The radical way to resolve the pop noise is to make the input on INN and INP balance.
    Best regards,
    Shawn Zheng