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TLV320DAC3203: Basic Initialization/Operation

Part Number: TLV320DAC3203
Other Parts Discussed in Thread: TLV320AIC3204, ,

Looking at the datasheet, there is a table of registers, but no description of each register that normally follows... for example, how does the page select register work??      Is there another document that I  missed somehow?

I understand there is a linux driver for the TLV320AIC3204 that should also work with the TLV320DAC3203:  github.com/torvalds/linux/blob/master/sound/soc/codecs/tlv320aic32x4.c

However, I'm trying to interface this using a lowly 16-bit micro (MSP430F677) and of course no linux.  I've studied the driver above, but can't make much sense of it, or if it even applies since the processor doesn't have a built-in I2S peripheral for the data.

Anyone have a typical power-on register initialization?  For example, a simple mono, 44khz sampling, where I could send it a sinewave table from the micro to see if it works?

  • Hi Parker,

    Welcome to e2e.
    Have you look at the Reference Guide?: www.ti.com/.../slau434.pdf
    You would need I2S interface to send audio data to the DAC.

    Best regards,
    -Ivan Salazar
    Applications Engineer - Low Power Audio & Actuators
  • Thanks, that reference guide was exactly what I was looking for!

    In regards to the I2S, although I don't have a dedicated I2S peripheral, do you see any potential issue with my plan of bit-banging the interface?   The timing is relatively slow.. for example, mono audio, at 44khz, 8-bit, is only around 500kbps.

    But even before that, wouldn't the evaluation kit (TLV320DAC3203EVM-K)  output audio, without any I2S data, just by enabling the beep generator with the appropriate settings (left/right channel volume,  sine wave frequency )?

  • Lewis,

    That's right, you can use the beep generator for preliminary test without I2S interface. Although you need to feed at least BCLK into the device as this is required for the beep generator to operate.

    Best regards,
    -Ivan Salazar
    Applications Engineer - Low Power Audio & Actuators
  • Thank you Ivan for the help!    

    I've max'd out the Beep Sample Length Registers (0x49-0x4B = 0xFFFFFF) ,  left the default (max) volume, and sin/cos coefficient registers (0x4C-0x4F) , then set the enable (Page 0 Reg 0x47 = 0x80).

    But regarding the clock, I've have a 12Mhz MCLK as the input to the PLL (Reg 0x04 3:0  =  0001), and wish to use the PLL output as the CODEC_CLKIN..   I've configured the PLL for a DAC_FS of 44.1khz (using Table 2-23).   So shouldn't BCLK be driven only if CODEC_CLKIN (DAC_FS) comes from BCLK (Reg 0x04 1:0 = 01) ?

  • Lewis,

    The beep generator needs at least some BCLK switching bits to work. Other way to try beep generator only with MCLK is to set TLV320DAC3203 as Master (WCLK & BCLK set as outputs).

    Best regards,
    -Ivan Salazar
    Applications Engineer - Low Power Audio & Actuators
  • I have Mclk (~16mhz) going to the chip, and have tried driving various bclk frequencies (30khz-90khz), yet while the beep register shows enabled (0x47 Bit 7 = 1), I don't see anything on the output pins (HPR, HPL). I've also tried various beep lengths and frequencies (Regs 0x48-0x4F) .. nothing seems to affect it.

    The readback of the registers* match what's written and/or the defaults, so I assume the SPI interface is working.. and M/BClk are present at the pins, so what else could be preventing the basic beep generator to function?

    *Page 0:
    Reg 0x00: 00 00 10 00 00 11 04 00 - 00 00 00 81 81 02 00 02
    Reg 0x10: 00 08 01 01 80 01 00 04 - 00 00 01 00 00 00 01 00
    Reg 0x20: 00 00 00 00 00 AA 11 00 - 00 00 00 00 00 00 00 00
    Reg 0x30: 00 00 00 00 00 12 02 02 - 02 00 00 00 01 01 00 D6
    Reg 0x40: 00 00 00 00 6F 38 00 80 - 00 FF FF FF 10 D8 7E E3

    Thanks,
    Lewis