This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TLV320AIC24K: Digital IO pin behaviour in power down

Part Number: TLV320AIC24K

Hello,

I would like to use the hardware power down feature of the codec. Would you please tell me what happens to the digital I/O pins when PWRDN is pulled low.

I'm particularly concerned with FS, SCLK, FSD and DIN.

The datasheet says that these pins are 'disabled', but when I set the device to hardware power down some of the the pins seem to be resistively (a few kOhms, certainly not more than 10k) driven (i.e. SCLK).

Thanks,

Paul