TLV320AIC3101: Setting ADC sampling rate 8KHZ

Stalker,

This is not expected behavior for the AIC3101. Can you be more specific in regards to the noise you are hearing?
are you using an EVM? or your own design?

best regards,
-Steve wilson

Hi Steve,

Thank you for your reply.  We are using our own design. What we do is looping ADC signal back to DAC.  input signal is sine wave 1KHZ, when sampling frequency is 48KHZ we are getting perfect sine wave at the DAC output. Once we try to lower down sampling frequency we getting some kind random noise: signal swings from 0V to VDD with relatively high frequency there is no specific pattern , see bellow. top line is input signal and bottom DAC output. All we do changing register 02 from 0x0 to 0xAA

Please advise.

Stalker

hi Stalker,

Do you change the clock rates while the ADC and DAC are powered up? if you power them down and then change the clock rates does the issue persist?

I have an EVM here and I am unable to reproduce the problem.
can you provide all of your register settings?

best regards,
-Steve Wilson

Hi Steve,

Thank you for your replay: I try two things:

1. to change register 0x02 when ADC/DAC both are powered up;

2. change register 0x02 first thing after releasing reset line 

In both cases result is the same.

My  register settings:

 i2cWrite(AIC3101_I2C_ADDR, AIC3101_SAMPLE_RATE_REG, 0xAA);   AA is bad; 0x0 works

i2cWrite(AIC3101_I2C_ADDR, AIC3101_CLK_GEN_REG,2)

i2cWrite(AIC3101_I2C_ADDR, AIC3101_CLK_REG, 0)

i2cWrite(AIC3101_I2C_ADDR, AIC3101_PLL_A_REG,0x81);

i2cWrite(AIC3101_I2C_ADDR, AIC3101_PLL_B_REG,0x18);

i2cWrite(AIC3101_I2C_ADDR, AIC3101_PLL_C_REG,0x16);

i2cWrite(AIC3101_I2C_ADDR, AIC3101_PLL_D_REG, 0x80);

i2cWrite(AIC3101_I2C_ADDR, AIC3101_OVERF_REG,1);

i2cWrite(AIC3101_I2C_ADDR, AIC3101_ASDI_A_REG, 0xD0);

i2cWrite(AIC3101_I2C_ADDR, AIC3101_ASDI_B_REG,0);

i2cWrite(AIC3101_I2C_ADDR, AIC3101_DATA_PATH_REG, 0x08);

i2cWrite(AIC3101_I2C_ADDR, AIC3101_MIC2L_TO_LADC_REG, 0x0F);

i2cWrite(AIC3101_I2C_ADDR, AIC3101_LADC_PGA_REG, 70);

i2cWrite(AIC3101_I2C_ADDR, AIC3101_MIC1LP_CNTR_REG, 0x07);

 i2cWrite(AIC3101_I2C_ADDR, AIC3101_LDAC_VOLUME_REG, 0);

i2cWrite(AIC3101_I2C_ADDR, AIC3101_DAC_PWR_CNTR_REG, 0xA0);

i2cWrite(AIC3101_I2C_ADDR, AIC3101_DAC_OUT_SW_REG, 0);

i2cWrite(AIC3101_I2C_ADDR, AIC3101_DAC_L1_HPLOUT,0x80);

i2cWrite(AIC3101_I2C_ADDR, AIC3101_HPLOUT_VOL_CNTR_REG, 0x09);

Please have a look and advise.

Regards,

Iouri

 

Hello Steve,

Did you have a chance to look at this request? Please advise at your earliest convenience.

Stalker 

Stalker,

I think I know whats going on now... you are doing this on an EVM right?

The EVM allows you to interface with a PC via the USB audio processor on the USBMODEVM board. When the Board is connected to a PC it will be automatically spitting out I2S clocks for whatever Frequency you have the PC set for. when you set the Device to Master mode, you need to turn off the I2S clocks from the USB audio processor. otherwise both clocks will run simultaneously, which causes noise/distortion etc..
to disable the I2S clock from the USB audio processor, look at the dipswitch SW2 on the USBMODEVM. switch #4 is labled "USB_I2S" turn that off. there is a separate switch for the MCLK, so you will still get that. unless you turn off Switch 5 "USB MCLK".

I apologise, i should've realized this sooner. I thought you were using a prototype board or something.

best regards,
-Steve Wilson

HI Steve,

Thank you very much for your reply;  Unfortunately I am not using EVM Audio processor; What I use CPU interfaced to the CODEC via I2C and I2S + reset line;

I am generating 16MHZ master clock  and feeding it to the CODEC; CODEC sets up as master ie CODEC generates BCLK and WCLK;

problem what I am experiencing is when I am trying to lower down sampling frequency for ADC/DAC by writing to the register 0x02;

any value written to that register is making ADC to produce junk;

please have look;

Regards,

Stalker

I am not using MODEM EVM board

Stalker, can you confirm that your Processor is not also configured as a master?

on the EVM, the only way I can reproduce your problem is if I have the TAS1020B (USB audio processor) on the USBMODEVM providing 48khz and I also set the Codec to Master. in master mode At 48khz, it does produce any audible problems, but when I adjust Register 2 to any other value, I get the noise you talk about.

But if I disable the WCLK and BLCK from the TAS1020B. I do not experience any problems. The TLV320AIC3101 works perfectly on all settings for register 2.

best regards,
-Steve wilson