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DIX4192-Q1: The use case of PIN BLS and SYNC

Part Number: DIX4192-Q1
Other Parts Discussed in Thread: DIX4192

what is the founction of BLS and SYNC?

How should BLS and SYNC used in system?

Please give some examples of utility of BLS and SYNC.

DIX4192 is applied in our system to transfer I2S data to SPDIF (AES encode data).

what is the difference between the line driver output and the CMOS-buffered output to external logic of DIT ? Is the line driver used to drive long cables (far end)  and CMOS buffer used to drive circuits (near end)?

  • Hello,
    welcome to e2e forum and apologies for the delayed response.

    As far as the BLS (Block START) usage goes, in some applications, it may be necessary to control the precise timing of the transmitted AES3 frame boundaries.

    As an input, the BLS pin may be used to force a block start condition, whereby the start of a new block of channel status and user data is initiated by generating a Z preamble for the next frame of data. The BLS input MUST be synchronized w. SYNC clock as shown in Fig 12 in the DS.

    Hope this clarifies the use of BLS/SYNC pins.