TAS6424L-Q1: Problem with part again, using PBTL mode and inputs not clear from datasheet.

Marc Yaxley

Expert 1105 points

Part Number: TAS6424L-Q1
Other Parts Discussed in Thread: PCM1803

Hi,

Ok, I have good timing inputs using PCM1803 and am beyond that problem. No "timing error" with this source.

However, the amp. chip gets warm and toggles the over heating error bits and shuts down after a minute.

I have the configuration from the data sheet: "Figure: 82". I am driving with the L/R channels in the I2S waveform

from the PCM1803 codec. I have SDIN1 and SDIN2 tied together as I only have a MONO source. I have the

inputs to the PCM1803 L/R also tied together as I simply need to make a 1KHz warning tone with the product.

I'm making power but see no sine wave at the outputs. The amp. gets hot but not load resistors. All I can imagine

is the duty cycle is 50% so no power is delivered to the loads.

I found the bit in "Table 13" which has something to do with the PBTL inputs and "inverting them". No doc's on

this in the data sheet except for a minor mention. The TAS6424Q1EVM and Puepulse software does have a

bit mroe in that it states the single bit seems to select for inputs 1&3 or 2&4. I have it 0, so 1&3 are inputs.

However with the two SDIN's tied together 3 is really the same as 1 since I2S is ONLY a L/R stream.

What is not clear is just what the heck is needed to drive the circuit in Fig. 82? Not spelled out at all.

I am hoping you aren't going to tell me I need to have two I2S feeds to get a 1&3 input channel rather

than simply feed it with one i2S in the typical L/R configuration. Would be a huge waste to put enough logic

on my board to make two feeds just to separate out channel 2 and make it channel 3 on SDIN2.

How the heck could this be done with as few parts as possible to get: LEFT=channel 1=SDIN1 and

RIGHT=channel2=SDIN2. Is this why I'm not getting any sound? Getting hot?

I simply can't believe you would design the IC this way. How are car stereo designers supposed to

come up with a channel 1 and 3 when all they need are L/R as 1/2? In PBTL mode the IC is just

a stereo amp. with L/R so why impose such a goofy constraint on the application design?

I expected that driving one I2S as L/R (64bit) would work ok on PBTL-1 and PBTL-2 would make

the same sound being it is getting the same (LEFT part of I2S frame) as channel 1, right?

Maybe I'm reading this wrong, not clear how the IC is intended to work when driven correctly?

Please advise on how I can get past this next hurdle and move on.

Regards,

Marc Yaxley

MySoftworks Co.

over 7 years ago

0 Marc Yaxley over 7 years ago

Expert 1105 points

Follow up. After studying the data sheet and sheets for other parts, some analog some digital I noticed the PBTL mode has both P terminals
of channel 1&2 connected and both M terminals of 1&2 connected. Your Fig:82 shows channel 1 P connected to channel 1 M through the two
inductors, this would be a direct short (as well as the other 3 channels). So a bunch of power would be absorbed in the inductors but nothing
heard on the speaker because of the short. Right? The Fig:82 is incorrect? This might have cost me a botched PCB layout guys! $5K wasted.
Unless you are doing some magic in the IC when it is told to be in the PBTL mode... but that would mean you somehow change the M side
to a P, which means changing the rail (PVDD or GND) that the MOSFET is pulling the output to... I doubt that, I think this is the bug....
(Also, there are several other bugs in the data sheet I noticed in various places, so the figure 82 might be a big one.)
Dam, I guess I can hand rewire the output to make it work if this is the case and also go for a 2nd PCB board layout in the mean time.
Regards,
Marc Y.

0 Tuan over 7 years ago

TI__Mastermind 33420 points

Hi Marc,

SDIN1 outputs to channels 1 and 2 and SDIN2 outputs to channel 3 and 4. You might want to check just one input analog at a time. Left will go to channel 1 for SDIN1 and channel 3 for SDIN2, etc.

Hope this helps.

Best,

Tuan

0 Tuan over 7 years ago in reply to Marc Yaxley

TI__Mastermind 33420 points

Hi Marc, the PBTL connection is after the LC filter so if you already have BTL PCB you can reroute it at the outputs. There is not a way to internally reroute the PBTL connections.
Best, Tuan

0 Marc Yaxley over 7 years ago in reply to Tuan

Expert 1105 points

I assumed that much Tuan. What I'm asking if I run the same I2S to BOTH SDIN1 and SDIN2 then channel one and three
are getting the same data, fine, my signal is mono anyways. The right channel in the I2S data stream would go unused
in my case. Is this ok for the amp?

0 Marc Yaxley over 7 years ago in reply to Marc Yaxley

Expert 1105 points

Would love an answer to this one. Has anybody configured PBTL as you show in this figure and used it? Did it work?

0 Marc Yaxley over 7 years ago in reply to Tuan

Expert 1105 points

Yes of course, my schematic is the same as Fig. 82. After the LC filter as shown. I still wonder about the fact that channel 1 P and M
are shorted together and channel 2 P and M are shorted together and the load is between these two "shorts". I understand that the
channel outputs are one half of a bridge so I guess with setting the MODE bits to PBTL that the device knows to use only one side of
the MOSFETS to pull up or down depending in a given channel. All I see is I get over temperature warnings and shutdown and no
sound at all from the load. I also see my power supply shoot up to 5 or more amps. on volume above 0xb0 on all channels. Does
one set all 4 volumes the same in PBTL mode? Again, lacking any real documentation in the data sheet for using this mode.

0 Marc Yaxley over 7 years ago in reply to Marc Yaxley

Expert 1105 points

OK, got it figured out. Would you please read what I've said and written as you should have already known this at TI.

YOUR DATA BOOK SCHEMATIC IS WRONG!!!! I reconnected the PBTL mode such that ch1P and ch2p run through the
inductors together then to the load, the ch1M and ch2M through inductors to the load and I now get double wattage
on the load as expected. Same with channels 3 and 4. You show ch1P and ch1M through inductors tied together then
to the load as well as ch2P and ch2M through inductors tied together to the load. This is a dead short for the bridge!!
I trusted your configuration since that is the ONLY documents on how to setup PBTL mode and your data sheet error
cost me a $5K board layout and build of our prototypes. Wish I could recover that from TI since I will be buying several
thousand of the amplifier chips in the near future. (Refer to figure 82 for the error schematic.) I had noticed this in
the design phase but thought setting PBTL mode in the I2C registers TI must be doing some magic in the IC to let
that configure the bridge in this mode.... who would have known? TI used to publish really good data sheets that
detail output drive circuitry of their parts, that seems to have disappeared or I would have been able to evaluate
what TI is doing and saw that there was an error, all using the documentation.

Just doesn't seem fair, I know errors creep in, but your support person was no help at all on this, suggesting more or
less "dummy" suggestions. I had to solve it myself. What' happened to the great 80's TI engineer guys anyway?
If that person knew and understood the IC they would have quickly gotten to this issue, even knowing that others
must have repeated the same error due to the data sheet error, still uncorrected. There are other errors in the
sheet too. So I started to suspect that there was a doc. error with what info. I have at hand.

A side note, it seems fine to drive SDIN1 and SDIN2 with the same signal as in PBTL SDIN2 (channel 3 input to the
amp.) seems fine for my application since I am making a MaONO amp. device. Again, I got a nonsense answer from
the support person that I had already figured out on my own. I never really got any answers to the several questions
I posted. If that person was really a TI engineer (like the ones in the 80's) they were super useful to run down design
errors and doc. errors as they appeared to know the products being sold. Sort of shameful that the customer has
to sort out serious issues with the docs. considering the part itself is fine and works as spec'ed. Not to mention
going through a design cycle only to find the PC boards are scrap due to that doc. error, cost $5K board layout and
build up, $10K in labor and time figuring this all out.

I would have thought when I wrote the IC was making a lot of heat and going into thermal shutdown but there
was no sound output, and it was sucking the sort of amperes it should that there must be a direct short some
where in the design. I stated we directly used the suggested application schematic from the data sheet. That
post seemed to fall on deaf or UN-knowledgeable ears or simply not been read with clarity?

Hopefully this post helps someone that might design this part in. Get that data sheet fixed ASAP,

Regards,
Marc Y.

0 Tuan over 7 years ago in reply to Marc Yaxley

TI__Mastermind 33420 points

Hi Marc,

It's your favorite TI engineer again. Thanks for your candid comments. As my favorite philosopher Billy Joel wrote "You maybe right, I maybe crazy ..."

Yes, we have customers who use PBTL mode as per the data sheet and it works.

The caveat is (1) put the device in standby, (2) write to register 00 bit D4 and/or D5 to put the channels in PBTL mode. The statement in the data sheet describes both (1) and (2). But I want to make it clear here.

Hope this answer is timely that you haven't spin your PCB already.

Best, Tuan

0 Marc Yaxley over 7 years ago in reply to Tuan

Expert 1105 points

Thanks Tuan,

Paragraph 10.1.2 doesn't really communicate how the two channel outputs are to be connected. It rather more is stating

about the I2C setup registers and that is part of my initial question from a few weeks ago. I have been setting all four

channels to "play" (0x00). I do sometimes get "DC load error" on one leg of a channel, this might be due to not putting

them all in "standby" wait a few milliseconds then set the new states, I can test/adjust that.

I am attaching a graphic file of how I have the part connected (just showing channel 3&4, 1&1 would be the same).

I have colored it to show the data book suggestion on the left in yellow, then the on the right is my reconnection of the

channels that gets me sound and no overheating as with the data sheet connections.

With a limited description in the data sheet one might wonder if the part when put in PBTL mode uses the legs

for channels such that even though 4M (minus) says minus it really pulls up when 4P does so both legs of channel

4 would be 4P (positive) and do the job IN PARALLEL. The other channel 3, would do the same, both of it's outputs

would be either M's or P's as determined by the bridge direction as driven.

That's the key, how does the PWM driver drive the channel output MOSFETs? When the I2C registers are set to

PBTL I just figured the part would reroute the PWM drive signal to make the schematic shown for PBTL work.

So that is what is not clear and confusing to an engineer, not enough info. given to really understand the mode

and what is done for us in the part based on register setting.

So my schematic changes might simply be undoing something I have not done correctly in the I2C register

setup. I have the EVM kit and software and used that as a model to see what PBTL does when selected although

I didn't connect up the output to a load, just observed the software setup that was done for that mode.

If I can salvage the original PCB with register changes, great. I'll work on that some more today.

There is no real way to know if the part is setup right for PBTL as that is mostly setting register and then

look at the same status bits as you would in BTL. Would the "channel state reporting register" see

9.1.13 section, read all 0x00 to show all 4 channels are in PLAY or would two legs show something

different because they are somehow inverted in function in the chip to produce the outputs as needed?

This is hard to explain what my thinking is so I'm trying my best. I loved it years ago when TI and others

published more on internals of a device, especially the output drive FETS and driver circuits so a guy

like me could figure out most things on our own. I realized these parts are complicated now days and

those diagrams would be huge sheets of graphics and for the most part not needed to use the parts.

Hope this helps background where I'm at and and what I might need to do based on TI's intent for

this part to work properly in the PBTL mode.

Regards,

Marc Y.

0 Marc Yaxley over 7 years ago in reply to Marc Yaxley

Expert 1105 points

0 Marc Yaxley over 7 years ago in reply to Tuan

Expert 1105 points

Hi, I have reread the data sheet on "Standby" and I am not toggling this line yet. I just use the device fro POR to set modes. However I
have been doing the firmware edit/compile/flash/run cycle many times and not been power down or pulling Standby low on each
initialization. This could account for some variance I have been seeing after my initial debug session start up. I'll add code to pull
Standby low, wait a few MS then load the I2C stuff (as I see you cant use I2C during Standby low). I am assuming this would be the intent
to use Standby to get to where the device would then allow setup for PBTL mode. This is what your pointing out I think.
Thanks,
Marc Y.

0 Marc Yaxley over 7 years ago in reply to Tuan

Expert 1105 points

0 Marc Yaxley over 7 years ago in reply to Tuan

Expert 1105 points

Tuan,

Busy day messing with this. The section you send 10.1.2 states "device must be in standby mode for the commands to take
effect". Now, if you look at "Table 5: Operating Modes", it states that in standby mode, I2S and I2C are "stopped", I take this to
mean the I2C in the device is not running and thus can not accept commands until standby mode is released?

If this is the case, can I release (pull high) standby input then initialize the device with the PBTL setup (reg: 0x00=0xc0)???

By saying "...channels must have the same state...", does this mean set both channels to PLAY (channel 1 and 2 to PLAY)?

Also, now I am pulsing the standby input low back to high, waiting 100mS then performing the full I2C register initialization.

I don't see any timing requirements when coming out of standby to wait before doing this or how long standby needs to
be as a pulse if using it that way. Would it be the same if I used the "reset device" bit in register 0x00, D7?
If I did that reset method how long before the device is ready to accept I2C setup commands?

Sure would have been a great solution if TI had supplied a simple source code library that dealt with the device and
all of it's details for us guys out there that have limited knowledge of a fairly technical part such as this one.

What say you?

Thanks,
Marc Y.

0 Marc Yaxley over 7 years ago in reply to Marc Yaxley

Expert 1105 points

Hi Taun,
My bad. After finally getting all ducks in line and getting the device really into PBTL mode it indeed works as the data sheet
schematic shows for connection. I was not going into PBTL from standby with reliability. I now hold standby low and do the
full I2C init. of all registers I need to set. Then pull the standby line high and indeed it was finding a DC short again, due to my
changing the schematic as I show in the attachment. I then undid my changes and restored the original PCB and low and
behold it works ad advertised. So, my boards are ok and all I need to do is find a better CPU which has on spec. I2S to drive
the amp. with or keep using the PCM1803 to make the I2S.
I am now easily pulling the wattage out of the device as per spec. and running the heck out of it at high power levels.
I have reached my wattage goals with the expected input amperage from the battery. Off and running, sorry about my
frustration level as I got to the other side of the wall on this part.
"If I knew then what I know now, there wouldn't be an issue", as always so true, learning curves are harder now days with
such integrated devices that are so bloody complicated.
Cheers,
Marc Yaxley

0 Tuan over 7 years ago in reply to Marc Yaxley

TI__Mastermind 33420 points

Hi Marc,

Not a problem there my friend; I'm glad it all worked out. I've been doing this for a long time and still learning. I do hear the frustrations you're going through. If I can be of any help, please don't hesitate to ask.

Best, Tuan

0 Tuan over 7 years ago in reply to Marc Yaxley

TI__Mastermind 33420 points

Marc, The new data sheet should be coming out shortly. The new version should have the correct the I2C operation during standby is active. You can write I2C commands to the device while the device is in standby. Best, tuan

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TAS6424L-Q1: Problem with part again, using PBTL mode and inputs not clear from datasheet.