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TLV320AIC3107 EVM bring up

Angela
Intellectual 595 points
Other Parts Discussed in Thread: TLV320AIC3107

1.       There is a pin on the 3107 chip called IOVDD that sets the logic high threshold.  The choices for this are +1.8 and +3.3 VDC.  The actual logic high threshold is 0.7 x IOVDD.   The EVM board comes with this  jumpered to +1.8 VDC.  Is this the right value for our board where the 3107 is controlled by a dsPIC that is a 3.3V part?

2.       On the 3107 EVM on the Left_LOP and Right_LOP line outputs there are RC filters (47-nF, 100-Ohm, 1-uF) --- are these important for us to include on our board design? 

3.     There is a difference in the Mic bias resistor values (2.2K vs 1K) and the Mic coupling cap values (0.47uF vs 0.1uF) between the page 18 of datasheet and the page 36 of EVM. Should I follow datasheet or EVM to get the highest microphone audio quality for speakerphone products?

 

  • 0
    Intellectual 595 points

    Forgot to mention, speakerphone is 1.6W at 8 OHM or 2.5W at 4 OHM.

  • 0
    TI__Mastermind 46195 points

    Hello Angela,

     1.       There is a pin on the 3107 chip called IOVDD that sets the logic high threshold.  The choices for this are +1.8 and +3.3 VDC.  The actual logic high threshold is 0.7 x IOVDD.   The EVM board comes with this  jumpered to +1.8 VDC.  Is this the right value for our board where the 3107 is controlled by a dsPIC that is a 3.3V part?

    - The default position for IOVDD jumper (W14) should be 2-3 (+3.3V) when it leaves the CM. This is the I/O voltage that the USB motherboard also communicates at.

    2.       On the 3107 EVM on the Left_LOP and Right_LOP line outputs there are RC filters (47-nF, 100-Ohm, 1-uF) --- are these important for us to include on our board design? 

    - The 1uF high pass capacitor takes care of the common-mode DC voltage of our line outputs (programmable to 1.35V, etc.) and should be included to ensure compatibility with other external devices. The .047uF and .1uF is a low pass filter that takes care of high frequency energy that is characteristic of sigma-delta converters due to noise shaping. For headphone drive this is not much concern since this energy is outside the audible frequencies and speakers act as natural LPFs themselves. However, for line-outputs it is highly recommended to have this LPF to ensure compatibility with all kinds of high impedance loads. Since the loads are high impednace, the gain error caused by the 100-ohm resistor is typically negligible.

    For the Class-D outputs in the AIC3107, we recommend using an LC filter for best efficiency and EMI performance. See http://focus.ti.com/lit/an/sloa119a/sloa119a.pdf.

    For the headphone outputs, the DC-block capacitor may or may not be required, depending if cap-less or ac-coupled mode is used. See datasheet for details.

    3.     There is a difference in the Mic bias resistor values (2.2K vs 1K) and the Mic coupling cap values (0.47uF vs 0.1uF) between the page 18 of datasheet and the page 36 of EVM. Should I follow datasheet or EVM to get the highest microphone audio quality for speakerphone products?

    - The microphone bias resistor should be chosen per the recommendation of the microphone manufacturer. A higher R will give more gain (the microphone capsule typically is a transducer connected to a common-source J-FET) and a higher MICBIAS voltage will give more headroom. Also you need to take into consideration the maximum current load of MICBIAS pin, which is mentioned in the datasheet. A 2.2k resistor is typical for most microphones in single-ended mode. Sometimes, the microphone is connected differentially with 1k betweeen MICBIAS and the (+) terminal and another 1k between the (-) terminal and ground, which is beneficial to remove common-mode noise due to noise picked out by the traces. The coupling caps values are a function of the desired corner frequency and input impedance. The 0.47uF will have more low frequency content. If the input impedance is 20kohm, this yields an fc = 17Hz.

    Regards,

    J-

     

     

  • 0 in reply to J-
    Intellectual 595 points

     

     3107 datasheet (page 25) seem to imply that there is a mode that uses BCLK without the presence of an MCLK input.  If we use MCLK input, can we use Microchip dsPIC's SPI clock (1Mhz) to provide MCLK to TLV320AIC3107?

    We could get a clock out of the dsPIC is to use an SPI clock.  We have an unused SPI port on the dsPIC.  From what I can tell, it is a copy of the crystal oscillator divided down.  Not sure about the jitter though after the dividers.  Per that TI app note, it is not good to use an MCLK source that is asynchronous from the microcontroller clock.

     

    Any ideas about how other people have solved the issue of getting a clock OUT of a dsPIC (or PIC)? 

  • 0 in reply to Angela
    TI__Mastermind 46195 points

    Angela,

    MCLK can be derived from BCLK. However, the fractional divider requires a range of 10 to 20 MHz to obtain a usual audio clock.

    To obtain the less jitter, it is best to set our AIC as an I2S master and let the MCU take these lines as interrupts. MCLK in this case would be derived from an on-board clock source.

    Regards,

    J-