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PCM1865: The input multiplexer won't allow 4x differential input channels

Other Parts Discussed in Thread: PCM1865

Hello,

I have a PCM1865 set up and working in 4ch TDM output mode with 4x differential audio inputs.

The issue im having is that no matter what combination of multiplexer settings i use, I can't get values from more than 3 channels at a time to show up as one of the channels is always reading near zero.

This is my setup code:

void ADC_init(void)
{
	__PCM1865_setPage(0);
	__PCM1865_setReg(0x00, 0xFE);	// Reset all registers

	__PCM1865_setReg(0x01, 0x20);	// PGA CH1_L to 20dB
	__PCM1865_setReg(0x02, 0x20);	// PGA CH1_R to 20dB
	__PCM1865_setReg(0x03, 0x20);	// PGA CH2_L to 20dB
	__PCM1865_setReg(0x04, 0x20);	// PGA CH2_R to 20dB
	__PCM1865_setReg(0x05, 0x86);	// Enable SMOOTH PGA Change, Independent Link PGA
	
	__PCM1865_setReg(0x06, 0x50);	// Polarity: Normal, Channel: VIN1P, VIN1M 	(CH1)
	__PCM1865_setReg(0x07, 0x50);	// Polarity: Normal, Channel: VIN2P, VIN2M 	(CH2)
	__PCM1865_setReg(0x08, 0x60);	// Polarity: Normal, Channel: VIN4P, VIN4M 	(CH3)
	__PCM1865_setReg(0x09, 0x60);	// Polarity: Normal, Channel: VIN3P, VIN3M   (CH4)
	
	__PCM1865_setReg(0x0A, 0x00);	// Secondary ADC Input: No Selection
	__PCM1865_setReg(0x0B, 0x0F);	// RX WLEN: 32 bit, TX WLEN: 16bit, FMT: TDM format
	__PCM1865_setReg(0x0C, 0x01);	// TDM_OSEL: 4ch TDM
		
	__PCM1865_setReg(0x10, 0x31);	// GPIO1_FUNC - SCK Out, GPIO0_FUNC - SPI MISO
	__PCM1865_setReg(0x11, 0x30);	// GPIO3_FUNC - SCK Out, GPIO2_FUNC - GPIO2
	
	__PCM1865_setReg(0x1B, 0x01);	// DIN_RESAMP: resample DIN with rising edge of BCK
	__PCM1865_setReg(0x20, 0x01);	// MST_MODE: Slave; CLKDET_EN: Enable
}

I have been able to get data incoming from all 4 of the inputs in some combination, but not at the same time.

Is there a clear configuration issue or is it more likely to be a silicon error?

Thanks for the help!

James

  • Hi, James,

    Welcome to E2E, Thanks for your interest in our products!.

    The register settings used seems fine, but I would like to try them on my EVM. I will make some tests and will get back to you as soon as I get some results. Are you using the EVM for the test?. What is the input provided to all the channels at the moment of test?.

    Best Regards,

      -Diego Meléndez López
       Audio Applications Engineer

  • Hi Diego, 

    Thanks for the quick response.

    I am using a custom PCB with a 1kHz 2V sine wave going into the inputs.

    I know that the ADCs and input circuit are working fine as I can get the expected result on all of the channels with different multiplexer configurations, just not all at the same time.

    Thanks for your help.

    James

  • Hi, James,

    I made some tests on the EVM with your code and the PCM1865 is able to send data on all four channels at the same time. There is no issue with the digital data with your current settings, which makes me think it is possible some problem with the TDM bus. Is it possible to isolate the TDM bus of the PCM1865 and check if the digital data of the four channels is sent at the same time?. Also, are you able to replicate this behavior on different boards?.

    Best Regards,

      -Diego Meléndez López
       Audio Applications Engineer

  • Hi Diego, 

    Thanks for running your tests. I have done some more testing but still have the exact same issue.

    I am now running the device as a master and using SAI Slave Rx on the MCU and an interesting artefact can be seen on the channel which contains the missing data as the SDO line decays as though it is not being driven by the PCM. I have included some scope screenshots showing a 2v pk-pk sine wave signal being applied to each channel in sequence.

    This is my current configuration setting:

    	__PCM1865_setPage(0);
    	__PCM1865_setReg(0x00, 0xFE);	// Reset all registers
    
    	__PCM1865_setReg(0x01, 0x20);	// PGA CH1_L to 20dB
    	__PCM1865_setReg(0x02, 0x20);	// PGA CH1_R to 20dB
    	__PCM1865_setReg(0x03, 0x20);	// PGA CH2_L to 20dB
    	__PCM1865_setReg(0x04, 0x20);	// PGA CH2_R to 20dB
    	__PCM1865_setReg(0x05, 0x86);	// Enable SMOOTH PGA Change, Independent Link PGA
    	
    	__PCM1865_setReg(0x06, 0x50);	// Polarity: Normal, Channel: VIN1P, VIN1M 	(CH1)
    	__PCM1865_setReg(0x07, 0x50);	// Polarity: Normal, Channel: VIN2P, VIN2M 	(CH2)
    	__PCM1865_setReg(0x08, 0x60);	// Polarity: Normal, Channel: VIN4P, VIN4M 	(CH3)
    	__PCM1865_setReg(0x09, 0x60);	// Polarity: Normal, Channel: VIN3P, VIN3M  (CH4)
    	
    	__PCM1865_setReg(0x0A, 0x00);	// Secondary ADC Input: No Selection
    	__PCM1865_setReg(0x0B, 0x0F);	// RX WLEN: 32 bit, TX WLEN: 16bit, FMT: TDM format
    	__PCM1865_setReg(0x0C, 0x01);	// TDM_OSEL: 4ch TDM
    		
    	__PCM1865_setReg(0x10, 0x31);	// GPIO1_FUNC - SCLK Out, GPIO0_FUNC - SPI MISO
    	__PCM1865_setReg(0x11, 0x30);	// GPIO3_FUNC - SCK Out,  GPIO2_FUNC - GPIO2
    	
    	__PCM1865_setReg(0x1B, 0x01);	// DIN_RESAMP: resample DIN with rising edge of BCK
    	__PCM1865_setReg(0x20, 0x11);	// MST_MODE: Master; CLKDET_EN: Enable

    CH1 with normal data

    CH2 with normal data

    CH3 with normal data

    CH4 showing missing data

    As you can see there is a clear decay on the missing channel and no data coming out of the PCM.

    Thanks

    James

  • Hi, James,

    Thanks for the detailed feedback. The code seems fine and is the same I have used before, with the only difference of the master mode enabling.

    From the captures you are sharing, I can see that the BCLK frequency is 64×Fs, which actually is not supported in TDM mode. When the PCM1865 is configured in TDM mode, a 256×Fs BCLK should be provided. This is a fixed requirement for the device, you can find more information in the TDM section of the datasheet. I think the issue you are experiencing is related to this; can you please try with a 256×Fs BCLK?.

    Best Regards,

      -Diego Meléndez López
       Audio Applications Engineer

  • HI Diego,

    That was the issue! Its working perfectly now.

    Thank you very much!

    James