The reset default setup of the TAS5470 without I2C configuration is left justified I2S at any of the supported word widths. In the TDM mode (which requires I2C setup), you can specify the time slot that will be directed to the audio DAC.
In section 7.3.3.2 of the data sheet there is a timing diagram of the I2S left justified default setup. It implies that the audio word is directed to the audio DAC for BOTH left and right data? Is this correct?
If TDM data is sent to the TAS5470 with a BCLK to LRCLK ratio of 256 (standard 8 slot TDM mode) and the TAS5470 has not been setup for TDM mode with the I2C bus, will the TAS5470 respond by playing all slots of the TDM data stream?
