This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TPA3255: TPA3255 Start up Issue

Part Number: TPA3255

We are having an issue with our voltage on start up, if the PVDD is above 27 Volts we start and run correctly, but below that the output will not come on.  If we start up at 27 volts and then turn the power down after start up the outputs will come on.  This is not a 100% problem some boards work some don't.  We are operating in PBTL mode, and see no fault indications on a scope.  Any Ideas?  We are not using this in a audio application so we are not concerned with distortion ect.

  • Hi Ted,

    The TPA3255 can operate with a PVDD down to around 12V. This is assuming that GVDD does not go below its minimum voltage of 10.8. I would check that GVDD is not dropping as you lower the PVDD voltage. However if this was the issue you would probably see a fault from under voltage.

    Off the top of my head the only reason the outputs would not turn on without FAULT or CLIP_OTW going low would be that CSTART was being held low. From your schematic it seems that should not be happening, but I also notice that you don't show an output LC filter. Our part should not be operated without a minimum of 5 uH of series inductance on the output.

    Justin
  • Yes we have the attached LC filter, with the load varying between 4 and 500 ohms.  Load does not affect start issue.

    Ted

  • Hi Ted,

    Were you able to confirm that GVDD = 12V, Reset = 3.3V, CSTART > 2V, and FAULT/CLIP_OTW are high when PVDD starts at 27V?

    Justin
  • Justin

    Fault and CLIP_OTW pulled up to 5 volts. We are correcting this, did it cause permanent damage?
    Reset pullup 22K Resistor to TPA3255 DVDD 3.3 volts.
    Fault and CLIP_OTW pulled up with 10K.

    Pulling the fault and clip_otw pull up resistors did not affect the start up operation.

    CSTART voltage appears to vary with PVDD. It stays at zero until PVDD is 27 volts and then goes to about 1.5 volts.
    After that it will output the signal when PVDD is 22 Volts CSTART will be 1.2 volts and ramp up to 1.6 volts volts as PVDD approaches 30 volts.

    The eval board has a jumper on CSTART for SE or BTL mode( it parallels a 0.047uF and a 0.47uF when in single ended mode) why?

    Ted
  • Also GVDD is 12 volts.

    Ted
  • Hi Ted,

    The Absolute max for the CLIP_OTW and FAULT pins is 4.2V. I believe if you have 5V going to them then they are most likely damaged.

    The jumper on the EVM is to allow two different CSTART capacitance. This will effect how much pop there is at startup and shutdown. It is best to get through CSTART ramp as quickly as possible in BTL mode (lower capacitance) and better to go slow for SE mode (higher capacitance).

    I am not sure why CSTART would vary with PVDD, it should be that once the PVDD and GVDD are a valid voltage, CSTART will ramp to its normal voltage. This makes me think that a voltage is being forced across CSTART from the board that is related to PVDD. How does the ground noise look?

    Would it be possible to share your layout or at least the layout around the device?

    Justin

  • We put in a new TPA3255 with 5 volts removed from fault and CLIP_OTW and the part starts up normally, I guess if you damage those two pins, the damage can cause the start up problem we were seeing.  However just to let you know the CSTART still is dependent on the PVDD voltage.  So this should close this thread.

    Thanks,

    Ted