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TLV320AIC3109-Q1: Datasheet errors

Zain Ul Abideen
Intellectual 550 points

Part Number: TLV320AIC3109-Q1

Hello

I am using TLV320AIC3109-Q1 in my system and while reading datasheet I have found some mistakes in datasheet.

In datasheet register map table (Table 8. TLV320AIC3109-Q1 Register Map) and its detail are not same in some registers.

i.e

Page 0 Register 0

Page 0 Register 8

Page 0 Register 9

I have read first nine registers of page 0 and found these mistakes and there can be more mistakes.I need to confirm these mistakes and need correct info or new register map. Datasheet is attached blew.

Regards

tlv320aic3109-q1.pdf

  • 0
    TI__Mastermind 30250 points
    Hello Zain,

    I am aware of a few errors in the register map, however none of them involve P0 Reg 0, P0 Reg 8 or P0 Reg 9

    Can you be specific about what you believe the errors are?

    best regards,
    -Steve Wilson
  • 0 in reply to Steve-Wilson
    Intellectual 550 points

    I have attached a pdf file, this is the page 41 of datasheet and error are highlighted in yellow.

    Also you know about few errors in datasheet, can you please tell me about them.errors.pdf

  • 0 in reply to Zain Ul Abideen
    TI__Mastermind 30250 points
    Zain,

    I see what you mean.

    You are Correct that Table 8 clearly has some errors.

    The register descriptions in section 7.6.2 (which directly follows the register map you've referenced) shows the correct format for registers 0,8,9,19 and 26.
    I've made note of the errors you've found, and I will comb through the rest of the register map. I will correct them in the next revision which I plan to do in the coming months.

    The errors that we currently know are:

    Registers 51,58, 65, 72,86 and 93 – D1 currently reads
    D1 = 0 When "All programmed gains to *Output Block* have been applied"
    D1 = 1 When "not all programmed gains to *Output Block* have been applied yet"

    This should be Should be :
    D1 = 0 When"not all programmed gains to *Output Block* have been applied yet"
    D1 = 1 When "All programmed gains to *Output Block* have been applied"


    Register 86 and 93 - D0 is R/W

    best regards,
    -Steve Wilson