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PLL1707: How to synchronize two audio clock domains?

Geza Balazs
Prodigy 10 points
Part Number: PLL1707
Other Parts Discussed in Thread: DS90LV011A, DS90LT012A

Dear TI Technical Support,

I am in the design phase of a high-end analog audio front-end module that will utilize PCM4220s and PCM1794As that are clocked by a PLL1707. I have made lots of designs like this, even with on-board clock distribution with CDCLVC11xx ICs. However, the newest requirement is that I shall be able to connect several boards together (up to several meters in distance), and I shall be able to synchronize these modules to the same master clock that is provided by one of the boards. I have understood that the PLL1707 has MCKO outputs that will output 27MHz LVCMOS clock signals and I reckon that these can be connected to other PLL1707s to their XT1 inputs (instead of using crystals). In this setup,

(1) Will all "slave" PLL1707s output the exact same frequency on SCKO outputs as the "master" chip? Phase is not relevant of course, but frequency synchronity is a must as I cannot afford sample rate conversion and I shall merge audio streams from the different boards.

(2) Can you recommend me a good way to propagate the 27MHz MCKO output between boards? As already mentioned, it can be up to several meters, so a strong enough driver that can properly drive a cable of this length is a must. Maybe a high bandwidth OPA on the transmitter side and a high bandwidth comparator on the receiver side? What PCB layout to use and what connectors?

(3) After making the signal travel such a long distance on a cable, will jitter still be acceptable in slave device SCKOs for high-end audio? Can the PLL1707 clean extra jitter introduced by the cable off the clock? There will be no other connections to this clock signal, only the one from the master MCKO to the slave XT1.

Many thanks in advance and best regards,

Geza

  • 0
    TI__Mastermind 28011 points
    Geza,

    I am more familar with higher frequency PLLs LMX series, but this device has many similarities to them. To respond to your questions:

    (1) I believe that they will be the same frequency. The PLL has zero phase error and this even talks about 0 error. Now this is assuming that you use the same master input reference; if you use a seperate 27 MHz crystal on each board, that's a different story.

    (2) I'm not really the expert on this, but differential signals, such as LVDS seem to be very popular. LVPECL has higher swing, but not a nice output impedance. I am thinking that over a long distance, output impedance could be a consideration.

    (3) I don't think that the PLL1701 would be a very good jitter cleaner. Looking at the block diagram, it seems that the loop filter is fully integrated. As a rule of thumb, integrated loop filters tend to have very high bandwidth (unless it's a digital PLL, and I doubt this is). So any low frequency noise below the loop bandwidth would pass right through. I would bet the loop bandwidth is on the order of 100's of kHz, so freqencies like 20 kHz and below likely will pass through. I don't know what kind of jitter to expect from long traces, bit if it picks up spurs at high frequencies, then maybe the PLL1701 will filter that, but this is way out of the audio frequecy range.

    Regards,
    Dean
  • 0
    Genius 3945 points
    I don't know how to answer your question about slaving the PLL1707 parts, but a good way to drive these fast signals across cables is to use LVDS drivers and receivers. For singles, there's the DS90LV011A driver and the DS90LT012A receiver (this receiver has built-in termination).