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Linux/TLV320AIC3104: TLV320AIC3104 (stereo audio codec) linux driver Mic gain settings

Part Number: TLV320AIC3104

Tool/software: Linux

I'm trying to address an issue with clipping on my microphone inputs to the tlv320aic3104, on a embedded linux system. To achieve this, I'm trying to reduce the gains before the inputs are mixed prior to entering the programmable gain amplifier.

The datasheet indicates that I can use the MIC2L/R to Left ADC Control Register (Table 23. Page 0/Register 17) to achieve this, however the linux driver I have doesn't provide me user space access to this. Instead it appears to map this register to the "Mic2L Switch" and Mic2R Switch"  of the Left PGA Mixer. Looking at the driver code (linux/sound/soc/codecs/tlv320aic3x.c) seems to be declaring this widget option, like this:

/* Left PGA Mixer for tlv320aic3104 */
static const struct snd_kcontrol_new aic3104_left_pga_mixer_controls[] = {
SOC_DAPM_SINGLE_AIC3X("Line1L Switch", LINE1L_2_LADC_CTRL, 3, 1, 1),
SOC_DAPM_SINGLE_AIC3X("Line1R Switch", LINE1R_2_LADC_CTRL, 3, 1, 1),
SOC_DAPM_SINGLE_AIC3X("Mic2L Switch", MIC3LR_2_LADC_CTRL, 4, 1, 1),
SOC_DAPM_SINGLE_AIC3X("Mic2R Switch", MIC3LR_2_LADC_CTRL, 0, 1, 1),
};

with the Mic2L switch turned on, i2cget returns values of 0x0f (0dB gain), and when off it returns 0xff (not connected)

I found the definition of the macro to be:

#define SOC_DAPM_SINGLE_AIC3X(xname, reg, shift, mask, invert) \
SOC_SINGLE_EXT(xname, reg, shift, mask, invert, \
snd_soc_dapm_get_volsw, snd_soc_dapm_put_volsw_aic3x)

And so as a shot in the dark, I've changed it to this, and rebuilt:

SOC_DAPM_SINGLE_AIC3X("Mic2L Switch", MIC3LR_2_LADC_CTRL, 4, 0xf, 0),

SOC_DAPM_SINGLE_AIC3X("Mic2R Switch", MIC3LR_2_LADC_CTRL, 0, 0xf, 0),

Which I had hoped would enable me have full access to the register, but this seems to have made the setting disappear, so it seems like that hasn't worked.

As a final note, I'm using a 2014 version of the driver. I've compared this to the latest version on github.com/torvalds/linux but can't see any differences which would address this.

Any help or advice is very much appreciated.

  • Hi Keith,

    TI doesn't provide driver support for these Codecs. The Drivers are very old and the teams that designed and supported them are no longer with TI. I can help you with device configuration, circuit recommendations, or schematic reviews.

    best regards,
    -Steve Wilson
  • Hi Steve,

    Thanks for getting back to me. I've overcome the problem by dropping the range on the inputs to the codec. One of the problems I've found was that the reference voltage being supplied was 1.8V, but that on the other side of a 470nF capacitor prior to entering the MIC2R and MIC2L pins on the codec, the reference is 1.2V. This meant the signal kept hitting the 0V rail and being clipped. Do you have any insight as to why the voltage would be lower?

    The AVDD and 2 DRVDD pins are connected to the 3V3 source, which I've measured to be slightly low at about 3.1V.

    The IOVDD is also connected to the 3V3 source, but the datasheet seems to indicate it would typically be 1.8V, max 3.6V. I'm guessing this isn't causing the issue I'm seeing.

    The DVDD is connected to the 1V8 source, which is I've measured to be correct.

    The DVSS, AVSSI, AVSS2 and DRVSS pins are all grounded.

    McASP / I2S seems to be working fine, as is I2C

    Any ideas, why I'm getting 1.2V reference on the  MIC2L and MIC2R pins?

    Keith.

  • Update: I've noticed that the MCLK input isn't running as I expected. We should be driving it with a 24MHz clock, but it appears to be holding at 1.2V. Seems like something to resolve first. I need to figure out whether the 1.2V is coming from McASP HCLK pin, or the codec.
  • Ignore the previous post about the clock rates. I was measuring the wrong test point. The MCLK is being driver at 12MHz.
  • Hi Keith,

    There should be a bias voltage on the input pins. typically it will be approximately 1.35-1.4V. Even with a lower AVDD, i wouldn't expect this value to change much.

    The full scale input voltage is .707VRMS, so 1v Peak. so you shouldn't really be clipping unless you're already beyond full scale.


    best regards,
    -Steve Wilson