Linux/TAS6424L-Q1: Issues with Linux playback

Manjunath Nagaraja

Prodigy 90 points

Part Number: TAS6424L-Q1
Other Parts Discussed in Thread: TAS6424

Tool/software: Linux

Hello All,

Had an issue with playback using 6424 Amp and hence the query

We are using 6424 in our board design to output I2S/ 8ch TDM

Wiring looks OK to me and I can see FSYNC and SCLK inputs on oscilloscope as well as input audio data

However when I playback, I hear only crackling sound in the headphone jack

i2c dump while playing is as follows: (headphone connected on CH1)

i2cdump -f -y 5 0x6a
No size specified (using byte-data access)
     0 1 2 3 4 5 6 7 8 9 a b c d e f    0123456789abcdef
00: 00 32 62 46 00 cf cf cf cf 00 11 11 82 22 00 ff    .2bF.????.???"..
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
20: 00 00 01 14 00 00 40 21 0a 00 00 00 00 00 00 00    ..??..@!?.......
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
50: 00 00 00 aa 00 00 00 00 00 00 00 12 32 f2 00 00    ...?.......?2?..
60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ........

Everything else seems fine -

aplay: 3078] ea9-audio sound: TAS6424 AMP-0 2ch, 48000Hz, 128000bytes
[   50.143878] [4:          aplay: 3078] tas6424 5-006a: tas6424_set_dai_fmt() fmt=0x4004
[   50.158470] [5:          aplay: 3078] tas6424 5-006a: tas6424_set_dai_tdm_slot() tx_mask=3 rx_mask=0
[   50.167667] [5:          aplay: 3078] tas6424 5-006a: tas6424_hw_params() rate=48000 width=16
[   50.176254] [5:          aplay: 3078] tas6424 5-006a: sap_ctrl in hw_params after rate set is 64
   50.199674] [3: kworker/u16:1:   58] tas6424 5-006a: tas6424_set_bias_level() level=1
[   50.207633] [3: kworker/u16:1:   58] tas6424 5-006a: Amp Powered Up
Stereo
[   50.451247] [3: kworker/u16:1:   58] tas6424 5-006a: tas6424_set_bias_level() level=2
[   50.451379] [5:          aplay: 3078] tas6424 5-006a: tas6424_dac_event() event=0x2
[   50.471264] [3: kworker/u16:9: 1711] tas6424 5-006a: tas6424_set_bias_level() level=3
[   50.471388] [6:          aplay: 3078] tas6424 5-006a: tas6424_mute() mute=0
^CAborted by signal Interrupt...
[   60.178213] [5:          aplay: 3078] tas6424 5-006a: tas6424_mute() mute=1

over 6 years ago

0 Shawn Zheng over 6 years ago

TI__Mastermind 24835 points

Hi Nagaraja-san,
We are looking into this issue and will get back you later.
Best regards,
Shawn Zheng

0 Dylan Yao over 6 years ago

TI__Genius 11080 points

Hi Nagaraja,

Register 0x0C value is 0x82, register 0x0D value is 0x22, it shows there is short to ground fault at channel 1 and there is open load fault at channel 2/3/4. Can you let me know how is the connecting of the load.

My question is:how is the impedance of headphone? If it is normal speaker, it can accept impedance lower than 40ohm. If using for high impedance load, you need set register 0x00 bit 0~3 to 1, which set output mode to line out mode.

Dylan

0 Manjunath Nagaraja over 6 years ago in reply to Dylan Yao

Prodigy 90 points

Hello Dylan,

Thanks for your response

I have connected my mobile's earphone to CH1 and nothing on other 3 channels

DO you think i need to connect some other form of speaker?

thanks

manjunath

0 Dylan Yao over 6 years ago in reply to Manjunath Nagaraja

TI__Genius 11080 points

Nagaraja,

Understand your setup, then to make it work, you have two options:

1. Set register 0x00 to 0x0F, that will set all output channels to lineout mode.

2. Just simply set register 0x09 to 0x01, that will disable load diagnostic feature.

Dylan

0 Manjunath Nagaraja over 6 years ago in reply to Dylan Yao

Prodigy 90 points

Hello Dylan,

I did the change you mentioned - writing 0xf to MODE_CTRL register @0x00

But I get the same periodic cracking sound . I am showing the output of i2cdump below. Is it possible there is some board related issue?

i2cdump -f -y 0x5 0x6a

No size specified (using byte-data access)
     0 1 2 3 4 5 6 7 8 9 a b c d e f    0123456789abcdef
00: 0f 32 62 46 00 cf cf cf cf 00 11 11 82 22 00 ff    ?2bF.????.???"..
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
20: 00 00 01 14 00 00 40 21 0a 00 00 00 00 00 00 00    ..??..@!?.......
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
50: 00 00 00 aa 00 00 00 00 00 00 00 12 32 f2 00 00    ...?.......?2?..
60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................

0 Dylan Yao over 6 years ago in reply to Manjunath Nagaraja

TI__Genius 11080 points

It shows option 1 also fail the diagnostic. we don't the impedance of your headphone .
Then please use option 2, just ignore the load diagnostic.

0 Manjunath Nagaraja over 6 years ago in reply to Dylan Yao

Prodigy 90 points

The crackling sound goes off, but there is only silence - even though volume is at 81%

0 Dylan Yao over 6 years ago in reply to Manjunath Nagaraja

TI__Genius 11080 points

I see register 0x0C is still 82, so there is short to ground fault in this channel. may you use a 4ohm or 8 ohm typical speaker to try? After it works, then we come back to headphone to see if there is any issue.

0 Manjunath Nagaraja over 6 years ago in reply to Dylan Yao

Prodigy 90 points

In I2s mode, I see the following dump when I run with you mods and using normal earphones

.    0 1 2 3 4 5 6 7 8 9 a b c d e f    0123456789abcdef
00: 0f 32 62 44 00 cf cf cf cf 01 11 11 00 00 00 55    ?2bD.???????...U
10: 00 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00    .?..............
20: 00 00 01 14 00 00 40 21 0a 00 00 00 00 00 00 00    ..??..@!?.......
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
50: 00 00 00 aa 00 00 00 00 00 00 00 12 32 f2 00 00    ...?.......?2?..
60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................

Does it look OK? I don't hear any sound from the earphones

Also, I have one query - Is MCLK mandatory for the TAS6424 to function? Can it run with just SCLK and FSYNC?

0 Dylan Yao over 6 years ago in reply to Manjunath Nagaraja

TI__Genius 11080 points

you can see register 0x11 is 10, that means there is clock fault. would you confirm your IIS input is correct? including MCLK, LRCLK, SCLK and DATA.

0 Manjunath Nagaraja over 6 years ago in reply to Dylan Yao

Prodigy 90 points

Should MCLK be an exact multiple of fs?
Also what is the meaning of "The MCLK clock must not be in phase to sync to SCLK"

0 Manjunath Nagaraja over 6 years ago in reply to Dylan Yao

Prodigy 90 points

Dear Dylan

Could you please review my clock settings and let me know if it is OK

FSYNC: 48000 Hz

SCLK: 1545660 (this is the actual value set after I request 1.536 MHz)

MCLK: 18547926 Hz

With this setting, I don't get clock error but the following status. The clock error is gone, but the

Channel State Reporting Register (address = 0x0F) always reports 0xAA - DC load diagnostics

Is it that MCLK has to be exactly 128, 256 or 512 fs?

0 1 2 3 4 5 6 7 8 9 a b c d e f    0123456789abcdef
00: 0f 32 62 44 00 cf cf cf cf 01 11 11 00 00 00 aa    ?2bD.???????...?
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
20: 00 00 01 14 00 00 40 21 0a 00 00 00 00 00 00 00    ..??..@!?.......
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
50: 00 00 00 aa 00 00 00 00 00 00 00 12 32 f2 00 00    ...?.......?2?..
60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................

0 Dylan Yao over 6 years ago in reply to Dylan Yao

TI__Genius 11080 points

Nagaraja,

Is the clock fault removed? I am not sure if you can send email to me dylan-yao@ti.com, it will be more efficient to help you close this issue with email discussion.

Dylan

0 Dylan Yao over 6 years ago in reply to Manjunath Nagaraja

TI__Genius 11080 points

Nagaraja,
I just see this, please ignore my last post. The answer to your question is: yes, MCLK has to be exactly 128, 256 or 512 fs. And if you are using TDM mode, then SCLK need to be 128 or 256 fs.

Dylan

0 onmyknees over 6 years ago in reply to Dylan Yao

Prodigy 150 points

Hello Dylan

This is Kyungwon who is Manjunath Nagaraja's colleague.

If you don't mind, could you let me know when 7 bit(reset) in Mode control register (0x00) can be changed from 1 (reset operation) to 0 (normal operation)?

Actually, I modified your codec probe to check the mode control bit

/* Reset device to establish well-defined startup state */
ret = regmap_update_bits(tas6424->regmap, TAS6424_MODE_CTRL, TAS6424_RESET, TAS6424_RESET);
if (ret) {
dev_info (dev, "unable to reset device: %d\n", ret);
return ret;
}

ret = regmap_read_poll_timeout(tas6424->regmap, TAS6424_MODE_CTRL, val, !(val & TAS6424_RESET), 0, TAS6424_RESET_TIMEOUT /*40000*/);
if (ret)
{
dev_info (dev, "unable to reset codec: %d RegAddr[0x%x]:0x%x\n", ret, (unsigned int)TAS6424_MODE_CTRL, val);
//return ret;
}

Unfortunately, it printed out always 0x80.

[ 20.009542] [5: swapper/0: 1] tas6424 5-006a: 5-006a supply pvdd not found, using dummy regulator

[ 20.049684] [5: swapper/0: 1] tas6424 5-006a: unable to reset codec: -110 RegAddr[0x0]:0x80

[ 20.049688] [5: swapper/0: 1] tas6424 5-006a: tas6424 register[0x0] value: 0x80

Regardless of Clks you mentioned, I think it should be changed to the normal operation. Am I right?

If I miss something, could you let me know?

I appreciate it.

Kyungwon

0 Dylan Yao over 6 years ago in reply to onmyknees

TI__Genius 11080 points

Hi Kyungwon,

The reset bit of TAS6424 will automatically reset to 0 after write 1 (This bit 1 keeps a IIC CLK time), so you will never read 1 from this bit.

May you confirm the driver is good? or can you capture the IIC CLK and DATA line waveform, so we can know whether it is really writting/reading to TAS6424?

Are you using Nagaraja's driver? As previous post from Nagaraja, he has successfully read/write from TAS6424.

Dylan

0 onmyknees over 6 years ago in reply to Dylan Yao

Prodigy 150 points

Dear Dylan

Thank you for your reply.
Actually, Manjunath and I are using same code.
Anyway, as you mentioned, I found the cause why the register dump in a source code was wrong.
it is because of the register cache in kernel source.
After I modified TAS6424_MODE_CTRL was included in volatile register, it has been fixed.

Furthermore, fortunately, now I can listen to a wav file using TAS6424.
Thank you for your support.

Best Regards,
Kyungwon

0 Dylan Yao over 6 years ago in reply to onmyknees

TI__Genius 11080 points

Kyungwon,

That's perfect, have fun.

Dylan

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